[PATCH] D153842: [PowerPC] Update input operands information of Power10 scheduling model

[Qiu Chaofan via Phabricator via llvm-commits]

qiucf updated this revision to Diff 535222.
qiucf added a comment.

Rebase after rG11b71ade <https://reviews.llvm.org/rG11b71ade51e0d1f90f1c68a7552a11f7e85eace1>


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D153842/new/

https://reviews.llvm.org/D153842

Files:
  llvm/lib/Target/PowerPC/P10InstrResources.td
  llvm/lib/Target/PowerPC/PPCScheduleP10.td
  llvm/test/CodeGen/PowerPC/builtins-ppc-p10vsx.ll
  llvm/test/CodeGen/PowerPC/mma-acc-memops.ll
  llvm/test/CodeGen/PowerPC/pcrel-jump-table.ll
  llvm/test/CodeGen/PowerPC/testComparesi32gtu.ll
  llvm/test/CodeGen/PowerPC/testComparesi32ltu.ll
  llvm/test/CodeGen/PowerPC/vector-reduce-add.ll

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