[PATCH] D153842: [PowerPC] Update input operands information of Power10 scheduling model

Qiu Chaofan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 27 01:08:50 PDT 2023


qiucf created this revision.
qiucf added reviewers: nemanjai, PowerPC, shchenz, lkail, amyk.
Herald added subscribers: kbarton, hiraditya.
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qiucf requested review of this revision.
Herald added a project: LLVM.
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Count of input operands affect pipeline forwarding in scheduling model. Previous Power10 model definition arranges some instructions into incorrect group, by counting the wrong number of input operands.

This patch updates the model, setting the input operands count correctly by excluding irrelevant immediate operands and count memory operands of load instructions correctly.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D153842

Files:
  llvm/lib/Target/PowerPC/P10InstrResources.td
  llvm/lib/Target/PowerPC/PPCScheduleP10.td
  llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll
  llvm/test/CodeGen/PowerPC/builtins-ppc-p10vsx.ll
  llvm/test/CodeGen/PowerPC/mma-acc-memops.ll
  llvm/test/CodeGen/PowerPC/pcrel-jump-table.ll
  llvm/test/CodeGen/PowerPC/testComparesi32gtu.ll
  llvm/test/CodeGen/PowerPC/testComparesi32ltu.ll
  llvm/test/CodeGen/PowerPC/vector-reduce-add.ll

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