[PATCH] D153899: [RISCV] Remove legacy TA/TU pseudo distinction for unary instructions
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jun 27 12:57:03 PDT 2023
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp:3426
// Transform (VMERGE_VVM_<LMUL>_TU false, false, true, allones, vl, sew) to
// (MMV_V_V_<LMUL>_TU false, true, vl, sew). It may decrease uses of VMSET.
bool RISCVDAGToDAGISel::performVMergeToVMv(SDNode *N) {
----------------
While you're here, can you fix this typo. `MMV`->`VMV`
================
Comment at: llvm/test/CodeGen/RISCV/rvv/vsetvli-insert-crossbb.mir:778
; CHECK-NEXT: [[PHI2:%[0-9]+]]:vr = PHI [[COPY3]], %bb.0, %16, %bb.1
+ ; CHECK-NEXT: dead $x0 = PseudoVSETVLIX0 killed $x0, 208 /* e32, m1, ta, ma */, implicit-def $vl, implicit-def $vtype, implicit $vl
; CHECK-NEXT: [[PseudoVLE32_V_M1_:%[0-9]+]]:vr = PseudoVLE32_V_M1 [[PHI]], 4, 5 /* e32 */, implicit $vl, implicit $vtype :: (load (s128) from %ir.lsr.iv12, align 4)
----------------
What happened here?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D153899/new/
https://reviews.llvm.org/D153899
More information about the llvm-commits
mailing list