[PATCH] D153864: [RISCV] Lower interleave2 intrinsics to vsseg2

Luke Lau via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jun 27 10:19:43 PDT 2023


luke updated this revision to Diff 535043.
luke added a comment.

Use Constant::getAllOnesValue instead of VLMaxSentinel


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D153864/new/

https://reviews.llvm.org/D153864

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/test/CodeGen/RISCV/rvv/fixed-vector-interleave-store.ll
  llvm/test/CodeGen/RISCV/rvv/vector-interleave-store.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D153864.535043.patch
Type: text/x-patch
Size: 19828 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230627/290b03e6/attachment.bin>


More information about the llvm-commits mailing list