[PATCH] D153499: [RISCV] Add support for custom CSRs for Sifive S76.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Jun 26 22:27:19 PDT 2023
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:1793
+
+ // Accept a alternate named Sys Reg if the alternate required features are
+ // present.
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"a alternate" -> "an alternate"
================
Comment at: llvm/lib/Target/RISCV/RISCVSystemOperands.td:23
+ // AltName to be used by Vendors for Custom Vendor Extension.
+ string AltName = "";
// A maximum of one deprecated name is supported right now. Unlike the
----------------
Do we only allow one vendor to implement an alternate name?
================
Comment at: llvm/lib/Target/RISCV/RISCVSystemOperands.td:310
+//===----------------------------------------------------------------------===//
+// Sifive S76 Custom Machine Mode Registers
+//===----------------------------------------------------------------------===//
----------------
Remove S76.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D153499/new/
https://reviews.llvm.org/D153499
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