[llvm] 632a8ac - [NFC] Autogenerate CodeGen/PowerPC/tail-dup-break-cfg.ll
Amaury Séchet via llvm-commits
llvm-commits at lists.llvm.org
Sun Jun 25 16:09:59 PDT 2023
Author: Amaury Séchet
Date: 2023-06-25T22:55:49Z
New Revision: 632a8aca079d2a1f1400f03158098c730f72d477
URL: https://github.com/llvm/llvm-project/commit/632a8aca079d2a1f1400f03158098c730f72d477
DIFF: https://github.com/llvm/llvm-project/commit/632a8aca079d2a1f1400f03158098c730f72d477.diff
LOG: [NFC] Autogenerate CodeGen/PowerPC/tail-dup-break-cfg.ll
Added:
Modified:
llvm/test/CodeGen/PowerPC/tail-dup-break-cfg.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/PowerPC/tail-dup-break-cfg.ll b/llvm/test/CodeGen/PowerPC/tail-dup-break-cfg.ll
index 62c1e068b84a7..45ea5f2be02be 100644
--- a/llvm/test/CodeGen/PowerPC/tail-dup-break-cfg.ll
+++ b/llvm/test/CodeGen/PowerPC/tail-dup-break-cfg.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
; RUN: llc -O2 -o - %s | FileCheck %s
target datalayout = "e-m:e-i64:64-n32:64"
target triple = "powerpc64le-grtev4-linux-gnu"
@@ -10,21 +11,49 @@ target triple = "powerpc64le-grtev4-linux-gnu"
; body2
; exit
-;CHECK-LABEL: tail_dup_break_cfg:
-;CHECK: mr [[TAGREG:[0-9]+]], 3
-;CHECK: andi. {{[0-9]+}}, [[TAGREG]], 1
-;CHECK-NEXT: bc 12, 1, [[BODY1LABEL:[._0-9A-Za-z]+]]
-;CHECK-NEXT: # %test2
-;CHECK-NEXT: andi. {{[0-9]+}}, [[TAGREG]], 2
-;CHECK-NEXT: bne 0, [[BODY2LABEL:[._0-9A-Za-z]+]]
-;CHECK: [[EXITLABEL:[._0-9A-Za-z]+]]: # %exit
-;CHECK: blr
-;CHECK-NEXT: [[BODY1LABEL]]
-;CHECK: andi. {{[0-9]+}}, [[TAGREG]], 2
-;CHECK-NEXT: beq 0, [[EXITLABEL]]
-;CHECK-NEXT: [[BODY2LABEL:[._0-9A-Za-z]+]]:
-;CHECK: b [[EXITLABEL]]
define void @tail_dup_break_cfg(i32 %tag) {
+; CHECK-LABEL: tail_dup_break_cfg:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mflr 0
+; CHECK-NEXT: .cfi_def_cfa_offset 48
+; CHECK-NEXT: .cfi_offset lr, 16
+; CHECK-NEXT: .cfi_offset r30, -16
+; CHECK-NEXT: std 30, -16(1) # 8-byte Folded Spill
+; CHECK-NEXT: stdu 1, -48(1)
+; CHECK-NEXT: mr 30, 3
+; CHECK-NEXT: std 0, 64(1)
+; CHECK-NEXT: andi. 3, 30, 1
+; CHECK-NEXT: bc 12, 1, .LBB0_3
+; CHECK-NEXT: # %bb.1: # %test2
+; CHECK-NEXT: andi. 3, 30, 2
+; CHECK-NEXT: bne 0, .LBB0_4
+; CHECK-NEXT: .LBB0_2: # %exit
+; CHECK-NEXT: addi 1, 1, 48
+; CHECK-NEXT: ld 0, 16(1)
+; CHECK-NEXT: ld 30, -16(1) # 8-byte Folded Reload
+; CHECK-NEXT: mtlr 0
+; CHECK-NEXT: blr
+; CHECK-NEXT: .LBB0_3: # %body1
+; CHECK-NEXT: bl a
+; CHECK-NEXT: nop
+; CHECK-NEXT: bl a
+; CHECK-NEXT: nop
+; CHECK-NEXT: bl a
+; CHECK-NEXT: nop
+; CHECK-NEXT: bl a
+; CHECK-NEXT: nop
+; CHECK-NEXT: andi. 3, 30, 2
+; CHECK-NEXT: beq 0, .LBB0_2
+; CHECK-NEXT: .LBB0_4: # %body2
+; CHECK-NEXT: bl b
+; CHECK-NEXT: nop
+; CHECK-NEXT: bl b
+; CHECK-NEXT: nop
+; CHECK-NEXT: bl b
+; CHECK-NEXT: nop
+; CHECK-NEXT: bl b
+; CHECK-NEXT: nop
+; CHECK-NEXT: b .LBB0_2
entry:
br label %test1
test1:
@@ -52,18 +81,46 @@ exit:
}
; The branch weights here hint that we shouldn't tail duplicate in this case.
-;CHECK-LABEL: tail_dup_dont_break_cfg:
-;CHECK: mr [[TAGREG:[0-9]+]], 3
-;CHECK: andi. {{[0-9]+}}, [[TAGREG]], 1
-;CHECK-NEXT: bc 4, 1, [[TEST2LABEL:[._0-9A-Za-z]+]]
-;CHECK-NEXT: # %body1
-;CHECK: [[TEST2LABEL]]: # %test2
-;CHECK-NEXT: andi. {{[0-9]+}}, [[TAGREG]], 2
-;CHECK-NEXT: beq 0, [[EXITLABEL:[._0-9A-Za-z]+]]
-;CHECK-NEXT: # %body2
-;CHECK: [[EXITLABEL:[._0-9A-Za-z]+]]: # %exit
-;CHECK: blr
define void @tail_dup_dont_break_cfg(i32 %tag) {
+; CHECK-LABEL: tail_dup_dont_break_cfg:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mflr 0
+; CHECK-NEXT: .cfi_def_cfa_offset 48
+; CHECK-NEXT: .cfi_offset lr, 16
+; CHECK-NEXT: .cfi_offset r30, -16
+; CHECK-NEXT: std 30, -16(1) # 8-byte Folded Spill
+; CHECK-NEXT: stdu 1, -48(1)
+; CHECK-NEXT: mr 30, 3
+; CHECK-NEXT: std 0, 64(1)
+; CHECK-NEXT: andi. 3, 30, 1
+; CHECK-NEXT: bc 4, 1, .LBB1_2
+; CHECK-NEXT: # %bb.1: # %body1
+; CHECK-NEXT: bl a
+; CHECK-NEXT: nop
+; CHECK-NEXT: bl a
+; CHECK-NEXT: nop
+; CHECK-NEXT: bl a
+; CHECK-NEXT: nop
+; CHECK-NEXT: bl a
+; CHECK-NEXT: nop
+; CHECK-NEXT: .LBB1_2: # %test2
+; CHECK-NEXT: andi. 3, 30, 2
+; CHECK-NEXT: beq 0, .LBB1_4
+; CHECK-NEXT: # %bb.3: # %body2
+; CHECK-NEXT: bl b
+; CHECK-NEXT: nop
+; CHECK-NEXT: bl b
+; CHECK-NEXT: nop
+; CHECK-NEXT: bl b
+; CHECK-NEXT: nop
+; CHECK-NEXT: bl b
+; CHECK-NEXT: nop
+; CHECK-NEXT: .LBB1_4: # %exit
+; CHECK-NEXT: addi 1, 1, 48
+; CHECK-NEXT: ld 0, 16(1)
+; CHECK-NEXT: ld 30, -16(1) # 8-byte Folded Reload
+; CHECK-NEXT: mtlr 0
+; CHECK-NEXT: blr
entry:
br label %test1
test1:
@@ -89,6 +146,7 @@ body2:
exit:
ret void
}
+
declare void @a()
declare void @b()
declare void @c()
@@ -98,18 +156,45 @@ declare void @d()
; out. When we consider whether to lay out succ after bb and to tail-duplicate
; it, v and ret have already been placed, so we tail-duplicate as it removes a
; branch and strictly increases fallthrough
-; CHECK-LABEL: tail_dup_no_succ
-; CHECK: # %entry
-; CHECK: # %v
-; CHECK: # %ret
-; CHECK: # %bb
-; CHECK: # %succ
-; CHECK: # %c
-; CHECK: bl c
-; CHECK: andi. {{[0-9]+}}, {{[0-9]+}}, 4
-; CHECK: beq
-; CHECK: b
define void @tail_dup_no_succ(i32 %tag) {
+; CHECK-LABEL: tail_dup_no_succ:
+; CHECK: # %bb.0: # %entry
+; CHECK-NEXT: mflr 0
+; CHECK-NEXT: .cfi_def_cfa_offset 48
+; CHECK-NEXT: .cfi_offset lr, 16
+; CHECK-NEXT: .cfi_offset r30, -16
+; CHECK-NEXT: std 30, -16(1) # 8-byte Folded Spill
+; CHECK-NEXT: stdu 1, -48(1)
+; CHECK-NEXT: mr 30, 3
+; CHECK-NEXT: andi. 3, 3, 1
+; CHECK-NEXT: std 0, 64(1)
+; CHECK-NEXT: bc 12, 1, .LBB2_3
+; CHECK-NEXT: .LBB2_1: # %v
+; CHECK-NEXT: bl d
+; CHECK-NEXT: nop
+; CHECK-NEXT: bl d
+; CHECK-NEXT: nop
+; CHECK-NEXT: .LBB2_2: # %ret
+; CHECK-NEXT: addi 1, 1, 48
+; CHECK-NEXT: ld 0, 16(1)
+; CHECK-NEXT: ld 30, -16(1) # 8-byte Folded Reload
+; CHECK-NEXT: mtlr 0
+; CHECK-NEXT: blr
+; CHECK-NEXT: .LBB2_3: # %bb
+; CHECK-NEXT: andi. 3, 30, 2
+; CHECK-NEXT: bne 0, .LBB2_5
+; CHECK-NEXT: # %bb.4: # %succ
+; CHECK-NEXT: andi. 3, 30, 4
+; CHECK-NEXT: beq 0, .LBB2_2
+; CHECK-NEXT: b .LBB2_1
+; CHECK-NEXT: .LBB2_5: # %c
+; CHECK-NEXT: bl c
+; CHECK-NEXT: nop
+; CHECK-NEXT: bl c
+; CHECK-NEXT: nop
+; CHECK-NEXT: andi. 3, 30, 4
+; CHECK-NEXT: beq 0, .LBB2_2
+; CHECK-NEXT: b .LBB2_1
entry:
%tagbit1 = and i32 %tag, 1
%tagbit1eq0 = icmp eq i32 %tagbit1, 0
@@ -134,7 +219,6 @@ ret:
ret void
}
-
!1 = !{!"branch_weights", i32 5, i32 3}
!2 = !{!"branch_weights", i32 95, i32 5}
!3 = !{!"branch_weights", i32 8, i32 3}
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