[llvm] e271a53 - [NFC] Autogenerate CodeGen/ARM/and-sext-combine.ll

[Amaury Séchet via llvm-commits]

Author: Amaury Séchet
Date: 2023-06-25T00:55:03Z
New Revision: e271a539c50d0729ce13a4ea1c8685a475fe6a44

URL: https://github.com/llvm/llvm-project/commit/e271a539c50d0729ce13a4ea1c8685a475fe6a44
DIFF: https://github.com/llvm/llvm-project/commit/e271a539c50d0729ce13a4ea1c8685a475fe6a44.diff

LOG: [NFC] Autogenerate CodeGen/ARM/and-sext-combine.ll

Added: 
    

Modified: 
    llvm/test/CodeGen/ARM/and-sext-combine.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/ARM/and-sext-combine.ll b/llvm/test/CodeGen/ARM/and-sext-combine.ll
index 3ca72b6b37a20..c101f7c475474 100644
--- a/llvm/test/CodeGen/ARM/and-sext-combine.ll
+++ b/llvm/test/CodeGen/ARM/and-sext-combine.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
 ; RUN: llc -mtriple=arm-eabi -mcpu=arm1156t2-s -mattr=+thumb2 %s -o - -O3 \
 ; RUN:  -asm-verbose=0 | FileCheck %s
 
@@ -10,14 +11,13 @@
 ; With this the folding, the `and` of the "signed extended load" of
 ; `%b` in `f_i16_i32` is rendered as a zero extended load.
 
-; CHECK-LABEL: f_i16_i32:
-; CHECK-NEXT: .fnstart
-; CHECK-NEXT: ldrh    r1, [r1]
-; CHECK-NEXT: ldrsh   r0, [r0]
-; CHECK-NEXT: smulbb  r0, r0, r1
-; CHECK-NEXT: mul     r0, r0, r1
-; CHECK-NEXT: bx      lr
 define i32 @f_i16_i32(ptr %a, ptr %b) {
+; CHECK-LABEL: f_i16_i32:
+; CHECK:         ldrh r1, [r1]
+; CHECK-NEXT:    ldrsh r0, [r0]
+; CHECK-NEXT:    smulbb r0, r0, r1
+; CHECK-NEXT:    mul r0, r0, r1
+; CHECK-NEXT:    bx lr
   %1 = load i16, ptr %a, align 2
   %sext.1 = sext i16 %1 to i32
   %2 = load i16, ptr %b, align 2