[llvm] 2e8111d - [NFC] Autogenerate CodeGen/ARM/pr35103.ll

[Amaury Séchet via llvm-commits]

Author: Amaury Séchet
Date: 2023-06-25T00:29:14Z
New Revision: 2e8111d4c4f8950ec012108dc98edc9cb934d7fa

URL: https://github.com/llvm/llvm-project/commit/2e8111d4c4f8950ec012108dc98edc9cb934d7fa
DIFF: https://github.com/llvm/llvm-project/commit/2e8111d4c4f8950ec012108dc98edc9cb934d7fa.diff

LOG: [NFC] Autogenerate CodeGen/ARM/pr35103.ll

Added: 
    

Modified: 
    llvm/test/CodeGen/ARM/pr35103.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/ARM/pr35103.ll b/llvm/test/CodeGen/ARM/pr35103.ll
index 4f0392f45fe4c..e2be40e64ba5f 100644
--- a/llvm/test/CodeGen/ARM/pr35103.ll
+++ b/llvm/test/CodeGen/ARM/pr35103.ll
@@ -1,7 +1,22 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
 ; RUN: llc -O2 -mtriple arm < %s | FileCheck %s
 
 ; Function Attrs: norecurse nounwind readnone
 define i32 @foo(i32 %vreg0, i32 %vreg1, i32 %vreg2, i32 %vreg3, i32 %vreg4) local_unnamed_addr {
+; CHECK-LABEL: foo:
+; CHECK:       @ %bb.0: @ %entry
+; CHECK-NEXT:    push {r11, lr}
+; CHECK-NEXT:    adds r2, r2, r0
+; CHECK-NEXT:    mov r12, #0
+; CHECK-NEXT:    adc lr, r12, #0
+; CHECK-NEXT:    adds r0, r2, r0
+; CHECK-NEXT:    ldr r2, [sp, #8]
+; CHECK-NEXT:    adc r0, r12, #0
+; CHECK-NEXT:    adds r1, r3, r1
+; CHECK-NEXT:    adcs r1, r2, #0
+; CHECK-NEXT:    adc r0, r0, lr
+; CHECK-NEXT:    pop {r11, lr}
+; CHECK-NEXT:    mov pc, lr
 entry:
   %conv = zext i32 %vreg2 to i64
   %conv1 = zext i32 %vreg0 to i64
@@ -24,20 +39,8 @@ entry:
   %add24 = add nuw nsw i32 %add11, %conv23
   ret i32 %add24
 
-; CHECK: push	{r11, lr}
-; CHECK-NEXT: adds	r2, r2, r0
-; CHECK-NEXT: mov	r12, #0
-; CHECK-NEXT: adc	lr, r12, #0
-; CHECK-NEXT: adds	r0, r2, r0
-; CHECK-NEXT: ldr	r2, [sp, #8]
-; CHECK-NEXT: adc	r0, r12, #0
-; CHECK-NEXT: adds	r1, r3, r1
 ; The interesting bit is the next instruction which looks
 ; like is computing a dead r1 but is actually computing a carry
 ; for the final adc.
-; CHECK-NEXT: adcs	r1, r2, #0
-; CHECK-NEXT: adc	r0, r0, lr
-; CHECK-NEXT: pop	{r11, lr}
-; CHECK-NEXT: mov	pc, lr
 
 }