[PATCH] D153620: [X86] Combine MUL+SRL+TRUNC to MULX for i32 on 64-bit
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 23 20:42:26 PDT 2023
craig.topper added a comment.
>> Most of these test are for fixed point intrinsics. Maybe we should change the lowering of those to what we want instead of using a DAGCombine to get there?
>
> They are not affected by DAGCombine but changes in `Select`. Is this what you expected here?
Why would it be the changes to Select? If the i8 or i16 umul_logo existed before this change, wouldn’t we have failed selection?
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CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D153620/new/
https://reviews.llvm.org/D153620
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