[PATCH] D143759: [AMDGPU] Implement whole wave register spill
Yashwant Singh via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Jun 22 23:33:35 PDT 2023
yassingh added inline comments.
================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:2218-2219
+ if (IsWWMRegSpill)
+ TII->insertScratchExecCopy(*MF, *MBB, MI, DL, MFI->getSGPRForEXECCopy(),
+ RS->isRegUsed(AMDGPU::SCC));
buildSpillLoadStore(
----------------
arsenm wrote:
> Indentation's off
clang format as well arc undos this indentation.
================
Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.cpp:2225
+ if (IsWWMRegSpill)
+ TII->restoreExec(*MF, *MBB, MI, DL, MFI->getSGPRForEXECCopy());
+
----------------
arsenm wrote:
> Indentation's off
same
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D143759/new/
https://reviews.llvm.org/D143759
More information about the llvm-commits
mailing list