[PATCH] D149775: [AMDGPU] Reserve SGPR pair when long branches are present

Thu Jun 22 09:52:14 PDT 2023

crobeck added inline comments.

================
Comment at: llvm/lib/Target/AMDGPU/GCNPreRALongBranchReg.cpp:134-136
+      Register Reg =
+          AMDGPU::SGPR_64RegClass.getRegister(STM.getMaxNumSGPRs(*MF) / 2 - 1);
+      MFI->setLongBranchReservedReg(Reg);
----------------
crobeck wrote:
> arsenm wrote:
> > This should be moved into a TRI reserve registers helper like the others.
> > 
> > Also, would be a bit safer to invert this by reserving by default and having this pass *remove* the reserved register
> We're not actually reserving the register here. We're just setting the flag that we need to reserve the register in TRI. But, I can move this if it makes more sense there.
> 
> If we instead invert it we then need to always run through everything and prove there isn't a long branch as opposed to exiting once if we find a long branch. 
This should be cleaner now with a call into TRI instead of grabbing my own registers. 

Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D149775/new/

https://reviews.llvm.org/D149775