[PATCH] D153499: [RISCV] Add support for custom CSRs for Sifive S76.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:1804
+    SysReg = RISCVSysReg::lookupSysRegByName(Identifier);
+    if(SysReg && SysReg->AltName && SysReg->haveAltRequiredFeatures(getSTI().getFeatureBits())){
+      Warning(S, "'" + Identifier + "' CSR is not available on the current subtarget. Instead '" +
----------------
Space after `if`


================
Comment at: llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp:1804
+    SysReg = RISCVSysReg::lookupSysRegByName(Identifier);
+    if(SysReg && SysReg->AltName && SysReg->haveAltRequiredFeatures(getSTI().getFeatureBits())){
+      Warning(S, "'" + Identifier + "' CSR is not available on the current subtarget. Instead '" +
----------------
craig.topper wrote:
> Space after `if`
Line exceeds 80 characters


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D153499/new/

https://reviews.llvm.org/D153499