[PATCH] D152963: [RISCV] Don't assume tail undefined if there's no policy op

[Luke Lau via Phabricator via llvm-commits]

luke updated this revision to Diff 532660.
luke added a comment.

Rebase, handle the case where the unmasked pseudo has a policy operand but the masked pseudo doesn't


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D152963/new/

https://reviews.llvm.org/D152963

Files:
  llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
  llvm/test/CodeGen/RISCV/rvv/allone-masked-to-unmasked.ll
  llvm/test/CodeGen/RISCV/rvv/ceil-vp.ll
  llvm/test/CodeGen/RISCV/rvv/double-round-conv.ll
  llvm/test/CodeGen/RISCV/rvv/fceil-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/fceil-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/ffloor-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/ffloor-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ceil-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fceil-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ffloor-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-floor-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fnearbyint-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fround-costrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-fround.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-froundeven-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-froundeven.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-ftrunc-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-nearbyint-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-rint-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-round-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundeven-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-roundtozero-vp.ll
  llvm/test/CodeGen/RISCV/rvv/float-round-conv.ll
  llvm/test/CodeGen/RISCV/rvv/floor-vp.ll
  llvm/test/CodeGen/RISCV/rvv/fnearbyint-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/fnearbyint-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/frint-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/fround-costrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/fround-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/froundeven-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/froundeven-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/ftrunc-constrained-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/ftrunc-sdnode.ll
  llvm/test/CodeGen/RISCV/rvv/half-round-conv.ll
  llvm/test/CodeGen/RISCV/rvv/nearbyint-vp.ll
  llvm/test/CodeGen/RISCV/rvv/rint-vp.ll
  llvm/test/CodeGen/RISCV/rvv/round-vp.ll
  llvm/test/CodeGen/RISCV/rvv/roundeven-vp.ll
  llvm/test/CodeGen/RISCV/rvv/roundtozero-vp.ll

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