[PATCH] D150324: [X86] Make constant `mul` -> `shl` + `add`/`sub` work for vector types

[Noah Goldstein via Phabricator via llvm-commits]

goldstein.w.n added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:48722-48724
+      if (auto *RawC = getTargetConstantFromNode(N->getOperand(1)))
+        if (auto *SplatC = RawC->getSplatValue())
+          C = &(SplatC->getUniqueInteger());
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pengfei wrote:
> In which case we need to analyze target constant?
Some of the tests in vector-mul.ll like: `@mul_v4i32_17(<4 x i32> %a0)`. Not exact sure why, but it does cover some cases.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D150324/new/

https://reviews.llvm.org/D150324