[PATCH] D152437: PowerPC/SPE: Add phony registers for high halves of SPE SuperRegs

[Kishan Parmar via Phabricator via llvm-commits]

long5hot created this revision.
long5hot added reviewers: jhibbits, nemanjai.
long5hot added projects: PowerPC, Backend.
Herald added subscribers: pengfei, shchenz, kbarton, hiraditya.
Herald added a project: All.
long5hot requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

The intent of this patch is to make upper halves of SPE SuperRegs(s0,..,s31)
as artificial regs, similiarly to how X86 has done it.
And emit store /reload instructions for the required halves.

PR : https://github.com/llvm/llvm-project/issues/57307


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D152437

Files:
  llvm/lib/Target/PowerPC/PPCFrameLowering.cpp
  llvm/lib/Target/PowerPC/PPCRegisterInfo.td
  llvm/test/CodeGen/PowerPC/fma-assoc.ll
  llvm/test/CodeGen/PowerPC/fp-strict-conv-spe.ll
  llvm/test/CodeGen/PowerPC/fp-strict.ll
  llvm/test/CodeGen/PowerPC/pr55463.ll
  llvm/test/CodeGen/PowerPC/spe.ll

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