[llvm] 590c6a1 - [PowerPC] Require FPCVT for store fptoi combination

Qiu Chaofan via llvm-commits llvm-commits at lists.llvm.org
Sun Jun 4 23:27:00 PDT 2023


Author: Qiu Chaofan
Date: 2023-06-05T14:26:32+08:00
New Revision: 590c6a17270ecbeb127af0f327f37f547484b66d

URL: https://github.com/llvm/llvm-project/commit/590c6a17270ecbeb127af0f327f37f547484b66d
DIFF: https://github.com/llvm/llvm-project/commit/590c6a17270ecbeb127af0f327f37f547484b66d.diff

LOG: [PowerPC] Require FPCVT for store fptoi combination

Added: 
    

Modified: 
    llvm/lib/Target/PowerPC/PPCISelLowering.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 5f7c0109fb529..985cc3d852743 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -15515,10 +15515,9 @@ SDValue PPCTargetLowering::PerformDAGCombine(SDNode *N,
 
     EVT Op1VT = N->getOperand(1).getValueType();
     unsigned Opcode = N->getOperand(1).getOpcode();
-    bool NeedsFPCVT = Opcode == ISD::FP_TO_UINT && Op1VT == MVT::i64;
 
     if ((Opcode == ISD::FP_TO_SINT || Opcode == ISD::FP_TO_UINT) &&
-        (!NeedsFPCVT || Subtarget.hasFPCVT())) {
+        Subtarget.hasFPCVT()) {
       SDValue Val= combineStoreFPToInt(N, DCI);
       if (Val)
         return Val;


        


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