[llvm] 41f8b6f - [GlobalIsel][X86] Regenerate G_MUL scalar legalization tests

[Simon Pilgrim via llvm-commits]

Author: Simon Pilgrim
Date: 2023-06-03T11:18:51+01:00
New Revision: 41f8b6fe74a916937a23e6f3f7655ff3f9101185

URL: https://github.com/llvm/llvm-project/commit/41f8b6fe74a916937a23e6f3f7655ff3f9101185
DIFF: https://github.com/llvm/llvm-project/commit/41f8b6fe74a916937a23e6f3f7655ff3f9101185.diff

LOG: [GlobalIsel][X86] Regenerate G_MUL scalar legalization tests

Add i8 test coverage

Added: 
    

Modified: 
    llvm/test/CodeGen/X86/GlobalISel/legalize-mul-scalar.mir

Removed: 
    


################################################################################
diff  --git a/llvm/test/CodeGen/X86/GlobalISel/legalize-mul-scalar.mir b/llvm/test/CodeGen/X86/GlobalISel/legalize-mul-scalar.mir
index 1e13f6d3577ea..2483a459b46ba 100644
--- a/llvm/test/CodeGen/X86/GlobalISel/legalize-mul-scalar.mir
+++ b/llvm/test/CodeGen/X86/GlobalISel/legalize-mul-scalar.mir
@@ -2,7 +2,12 @@
 # RUN: llc -O0 -mtriple=x86_64-linux-gnu -run-pass=legalizer %s -o - | FileCheck %s
 
 --- |
-  define void @test_mul_i1() { ret void}
+  define void @test_mul_i1() { ret void }
+
+  define i8 @test_mul_i8(i8 %arg1, i8 %arg2) {
+    %ret = mul i8 %arg1, %arg2
+    ret i8 %ret
+  }
 
   define i16 @test_mul_i16(i16 %arg1, i16 %arg2) {
     %ret = mul i16 %arg1, %arg2
@@ -18,7 +23,6 @@
     %ret = mul i64 %arg1, %arg2
     ret i64 %ret
   }
-
 ...
 ---
 name:            test_mul_i1
@@ -34,14 +38,14 @@ body:             |
 
     ; CHECK-LABEL: name: test_mul_i1
     ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edx
-    ; CHECK: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
-    ; CHECK: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
-    ; CHECK: [[MUL:%[0-9]+]]:_(s8) = G_MUL [[TRUNC]], [[TRUNC1]]
-    ; CHECK: [[DEF:%[0-9]+]]:_(p0) = G_IMPLICIT_DEF
-    ; CHECK: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 1
-    ; CHECK: [[AND:%[0-9]+]]:_(s8) = G_AND [[MUL]], [[C]]
-    ; CHECK: G_STORE [[AND]](s8), [[DEF]](p0) :: (store (s1))
-    ; CHECK: RET 0
+    ; CHECK-NEXT: [[TRUNC:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
+    ; CHECK-NEXT: [[TRUNC1:%[0-9]+]]:_(s8) = G_TRUNC [[COPY]](s32)
+    ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s8) = G_MUL [[TRUNC]], [[TRUNC1]]
+    ; CHECK-NEXT: [[DEF:%[0-9]+]]:_(p0) = G_IMPLICIT_DEF
+    ; CHECK-NEXT: [[C:%[0-9]+]]:_(s8) = G_CONSTANT i8 1
+    ; CHECK-NEXT: [[AND:%[0-9]+]]:_(s8) = G_AND [[MUL]], [[C]]
+    ; CHECK-NEXT: G_STORE [[AND]](s8), [[DEF]](p0) :: (store (s1))
+    ; CHECK-NEXT: RET 0
     %0(s32) = COPY $edx
     %1(s1) = G_TRUNC %0(s32)
     %2(s1) = G_MUL %1, %1
@@ -50,6 +54,33 @@ body:             |
     RET 0
 ...
 ---
+name:            test_mul_i8
+alignment:       16
+legalized:       false
+regBankSelected: false
+registers:
+  - { id: 0, class: _ }
+  - { id: 1, class: _ }
+  - { id: 2, class: _ }
+body:             |
+  bb.1 (%ir-block.0):
+    liveins: $edi, $esi
+
+    ; CHECK-LABEL: name: test_mul_i8
+    ; CHECK: liveins: $edi, $esi
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s8) = COPY $dl
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s8) = COPY $sil
+    ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s8) = G_MUL [[COPY]], [[COPY1]]
+    ; CHECK-NEXT: $al = COPY [[MUL]](s8)
+    ; CHECK-NEXT: RET 0, implicit $al
+    %0(s8) = COPY $dl
+    %1(s8) = COPY $sil
+    %2(s8) = G_MUL %0, %1
+    $al = COPY %2(s8)
+    RET 0, implicit $al
+...
+---
 name:            test_mul_i16
 alignment:       16
 legalized:       false
@@ -63,17 +94,18 @@ body:             |
     liveins: $edi, $esi
 
     ; CHECK-LABEL: name: test_mul_i16
-    ; CHECK: [[COPY:%[0-9]+]]:_(s16) = COPY $di
-    ; CHECK: [[COPY1:%[0-9]+]]:_(s16) = COPY $si
-    ; CHECK: [[MUL:%[0-9]+]]:_(s16) = G_MUL [[COPY]], [[COPY1]]
-    ; CHECK: $ax = COPY [[MUL]](s16)
-    ; CHECK: RET 0, implicit $ax
+    ; CHECK: liveins: $edi, $esi
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s16) = COPY $di
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s16) = COPY $si
+    ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s16) = G_MUL [[COPY]], [[COPY1]]
+    ; CHECK-NEXT: $ax = COPY [[MUL]](s16)
+    ; CHECK-NEXT: RET 0, implicit $ax
     %0(s16) = COPY $di
     %1(s16) = COPY $si
     %2(s16) = G_MUL %0, %1
     $ax = COPY %2(s16)
     RET 0, implicit $ax
-
 ...
 ---
 name:            test_mul_i32
@@ -89,17 +121,18 @@ body:             |
     liveins: $edi, $esi
 
     ; CHECK-LABEL: name: test_mul_i32
-    ; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
-    ; CHECK: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
-    ; CHECK: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[COPY]], [[COPY1]]
-    ; CHECK: $eax = COPY [[MUL]](s32)
-    ; CHECK: RET 0, implicit $eax
+    ; CHECK: liveins: $edi, $esi
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s32) = COPY $edi
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s32) = COPY $esi
+    ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s32) = G_MUL [[COPY]], [[COPY1]]
+    ; CHECK-NEXT: $eax = COPY [[MUL]](s32)
+    ; CHECK-NEXT: RET 0, implicit $eax
     %0(s32) = COPY $edi
     %1(s32) = COPY $esi
     %2(s32) = G_MUL %0, %1
     $eax = COPY %2(s32)
     RET 0, implicit $eax
-
 ...
 ---
 name:            test_mul_i64
@@ -115,15 +148,16 @@ body:             |
     liveins: $rdi, $rsi
 
     ; CHECK-LABEL: name: test_mul_i64
-    ; CHECK: [[COPY:%[0-9]+]]:_(s64) = COPY $rdi
-    ; CHECK: [[COPY1:%[0-9]+]]:_(s64) = COPY $rsi
-    ; CHECK: [[MUL:%[0-9]+]]:_(s64) = G_MUL [[COPY]], [[COPY1]]
-    ; CHECK: $rax = COPY [[MUL]](s64)
-    ; CHECK: RET 0, implicit $rax
+    ; CHECK: liveins: $rdi, $rsi
+    ; CHECK-NEXT: {{  $}}
+    ; CHECK-NEXT: [[COPY:%[0-9]+]]:_(s64) = COPY $rdi
+    ; CHECK-NEXT: [[COPY1:%[0-9]+]]:_(s64) = COPY $rsi
+    ; CHECK-NEXT: [[MUL:%[0-9]+]]:_(s64) = G_MUL [[COPY]], [[COPY1]]
+    ; CHECK-NEXT: $rax = COPY [[MUL]](s64)
+    ; CHECK-NEXT: RET 0, implicit $rax
     %0(s64) = COPY $rdi
     %1(s64) = COPY $rsi
     %2(s64) = G_MUL %0, %1
     $rax = COPY %2(s64)
     RET 0, implicit $rax
-
 ...