[PATCH] D151992: [RISCV] Avoid illegal DAG combination for strict-fp nodes.

Yeting Kuo via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jun 2 06:22:01 PDT 2023


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Those combines may change the exception behavior and rounding behavior.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D151992

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp


Index: llvm/lib/Target/RISCV/RISCVISelLowering.cpp
===================================================================
--- llvm/lib/Target/RISCV/RISCVISelLowering.cpp
+++ llvm/lib/Target/RISCV/RISCVISelLowering.cpp
@@ -11138,6 +11138,10 @@
 
   SDValue Src = N->getOperand(0);
 
+  // Don't do this for strict-fp Src.
+  if (Src->isStrictFPOpcode() || Src->isTargetStrictFPOpcode())
+    return SDValue();
+
   // Ensure the FP type is legal.
   if (!TLI.isTypeLegal(Src.getValueType()))
     return SDValue();
@@ -11237,6 +11241,10 @@
 
   SDValue Src = N->getOperand(0);
 
+  // Don't do this for strict-fp Src.
+  if (Src->isStrictFPOpcode() || Src->isTargetStrictFPOpcode())
+    return SDValue();
+
   // Ensure the FP type is also legal.
   if (!TLI.isTypeLegal(Src.getValueType()))
     return SDValue();


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