[llvm] fa45fb7 - [InstCombine] Handle assumes in multi-use demanded bits simplification
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 2 05:24:33 PDT 2023
Author: Nikita Popov
Date: 2023-06-02T14:24:24+02:00
New Revision: fa45fb7f0cbaaca59c35c4d5980246be54ed0eff
URL: https://github.com/llvm/llvm-project/commit/fa45fb7f0cbaaca59c35c4d5980246be54ed0eff
DIFF: https://github.com/llvm/llvm-project/commit/fa45fb7f0cbaaca59c35c4d5980246be54ed0eff.diff
LOG: [InstCombine] Handle assumes in multi-use demanded bits simplification
This fixes the largest remaining discrepancy between results of
computeKnownBits() and SimplifyDemandedBits(). We only care about
the multi-use case here, because the assume necessarily introduces
an extra use.
Added:
Modified:
llvm/include/llvm/Analysis/ValueTracking.h
llvm/lib/Analysis/ValueTracking.cpp
llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
llvm/test/Transforms/InstCombine/assume.ll
llvm/test/Transforms/InstCombine/shift.ll
llvm/test/Transforms/InstCombine/zext-or-icmp.ll
Removed:
################################################################################
diff --git a/llvm/include/llvm/Analysis/ValueTracking.h b/llvm/include/llvm/Analysis/ValueTracking.h
index 76b49c7efa61..14e80ad290fb 100644
--- a/llvm/include/llvm/Analysis/ValueTracking.h
+++ b/llvm/include/llvm/Analysis/ValueTracking.h
@@ -38,6 +38,7 @@ struct KnownBits;
class Loop;
class LoopInfo;
class MDNode;
+class SimplifyQuery;
class StringRef;
class TargetLibraryInfo;
class Value;
@@ -93,6 +94,10 @@ KnownBits computeKnownBits(const Value *V, const APInt &DemandedElts,
/// \p KnownOne the set of bits that are known to be one
void computeKnownBitsFromRangeMetadata(const MDNode &Ranges, KnownBits &Known);
+/// Merge bits known from assumes into Known.
+void computeKnownBitsFromAssume(const Value *V, KnownBits &Known,
+ unsigned Depth, const SimplifyQuery &Q);
+
/// Using KnownBits LHS/RHS produce the known bits for logic op (and/xor/or).
KnownBits analyzeKnownBitsFromAndXorOr(
const Operator *I, const KnownBits &KnownLHS, const KnownBits &KnownRHS,
diff --git a/llvm/lib/Analysis/ValueTracking.cpp b/llvm/lib/Analysis/ValueTracking.cpp
index fe0c414b1bbf..94b409527be0 100644
--- a/llvm/lib/Analysis/ValueTracking.cpp
+++ b/llvm/lib/Analysis/ValueTracking.cpp
@@ -864,8 +864,8 @@ static void computeKnownBitsFromCmp(const Value *V, const ICmpInst *Cmp,
}
}
-static void computeKnownBitsFromAssume(const Value *V, KnownBits &Known,
- unsigned Depth, const SimplifyQuery &Q) {
+void llvm::computeKnownBitsFromAssume(const Value *V, KnownBits &Known,
+ unsigned Depth, const SimplifyQuery &Q) {
// Use of assumptions is context-sensitive. If we don't have a context, we
// cannot use them!
if (!Q.AC || !Q.CxtI)
diff --git a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
index 56e4515a28b1..32fb80c98dc6 100644
--- a/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
+++ b/llvm/lib/Transforms/InstCombine/InstCombineSimplifyDemanded.cpp
@@ -1008,6 +1008,7 @@ Value *InstCombinerImpl::SimplifyMultipleUseDemandedBits(
computeKnownBits(I->getOperand(1), RHSKnown, Depth + 1, CxtI);
computeKnownBits(I->getOperand(0), LHSKnown, Depth + 1, CxtI);
Known = LHSKnown & RHSKnown;
+ computeKnownBitsFromAssume(I, Known, Depth, SQ.getWithInstruction(CxtI));
// If the client is only demanding bits that we know, return the known
// constant.
@@ -1027,6 +1028,7 @@ Value *InstCombinerImpl::SimplifyMultipleUseDemandedBits(
computeKnownBits(I->getOperand(1), RHSKnown, Depth + 1, CxtI);
computeKnownBits(I->getOperand(0), LHSKnown, Depth + 1, CxtI);
Known = LHSKnown | RHSKnown;
+ computeKnownBitsFromAssume(I, Known, Depth, SQ.getWithInstruction(CxtI));
// If the client is only demanding bits that we know, return the known
// constant.
@@ -1048,6 +1050,7 @@ Value *InstCombinerImpl::SimplifyMultipleUseDemandedBits(
computeKnownBits(I->getOperand(1), RHSKnown, Depth + 1, CxtI);
computeKnownBits(I->getOperand(0), LHSKnown, Depth + 1, CxtI);
Known = LHSKnown ^ RHSKnown;
+ computeKnownBitsFromAssume(I, Known, Depth, SQ.getWithInstruction(CxtI));
// If the client is only demanding bits that we know, return the known
// constant.
@@ -1080,6 +1083,7 @@ Value *InstCombinerImpl::SimplifyMultipleUseDemandedBits(
bool NSW = cast<OverflowingBinaryOperator>(I)->hasNoSignedWrap();
Known = KnownBits::computeForAddSub(/*Add*/ true, NSW, LHSKnown, RHSKnown);
+ computeKnownBitsFromAssume(I, Known, Depth, SQ.getWithInstruction(CxtI));
break;
}
case Instruction::Sub: {
@@ -1095,6 +1099,7 @@ Value *InstCombinerImpl::SimplifyMultipleUseDemandedBits(
bool NSW = cast<OverflowingBinaryOperator>(I)->hasNoSignedWrap();
computeKnownBits(I->getOperand(0), LHSKnown, Depth + 1, CxtI);
Known = KnownBits::computeForAddSub(/*Add*/ false, NSW, LHSKnown, RHSKnown);
+ computeKnownBitsFromAssume(I, Known, Depth, SQ.getWithInstruction(CxtI));
break;
}
case Instruction::AShr: {
diff --git a/llvm/test/Transforms/InstCombine/assume.ll b/llvm/test/Transforms/InstCombine/assume.ll
index 83ff0e3a392d..bd909ad582e1 100644
--- a/llvm/test/Transforms/InstCombine/assume.ll
+++ b/llvm/test/Transforms/InstCombine/assume.ll
@@ -833,8 +833,7 @@ define void @assume_makes_and_known_assume_on_bitwise(ptr %p, i32 %a, i32 %b) {
; CHECK-NEXT: [[AND:%.*]] = and i32 [[X]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp eq i32 [[AND]], 0
; CHECK-NEXT: call void @llvm.assume(i1 [[CMP]])
-; CHECK-NEXT: [[AND2:%.*]] = and i32 [[X]], 1
-; CHECK-NEXT: store i32 [[AND2]], ptr [[P:%.*]], align 4
+; CHECK-NEXT: store i32 0, ptr [[P:%.*]], align 4
; CHECK-NEXT: ret void
;
%x = or i32 %a, %b
diff --git a/llvm/test/Transforms/InstCombine/shift.ll b/llvm/test/Transforms/InstCombine/shift.ll
index c8e00cd062b5..ede8c8c5c8f7 100644
--- a/llvm/test/Transforms/InstCombine/shift.ll
+++ b/llvm/test/Transforms/InstCombine/shift.ll
@@ -1765,12 +1765,11 @@ define void @ashr_out_of_range_1(ptr %A) {
define void @ossfuzz_38078(i32 %arg, i32 %arg1, ptr %ptr, ptr %ptr2, ptr %ptr3, ptr %ptr4, ptr %ptr5, ptr %ptr6, ptr %ptr7) {
; CHECK-LABEL: @ossfuzz_38078(
; CHECK-NEXT: bb:
-; CHECK-NEXT: [[I2:%.*]] = add nsw i32 [[ARG:%.*]], [[ARG1:%.*]]
-; CHECK-NEXT: [[B3:%.*]] = or i32 [[I2]], 2147483647
; CHECK-NEXT: [[G1:%.*]] = getelementptr i32, ptr [[PTR:%.*]], i64 -1
-; CHECK-NEXT: [[I5:%.*]] = icmp eq i32 [[I2]], 0
+; CHECK-NEXT: [[I2:%.*]] = sub i32 0, [[ARG1:%.*]]
+; CHECK-NEXT: [[I5:%.*]] = icmp eq i32 [[I2]], [[ARG:%.*]]
; CHECK-NEXT: call void @llvm.assume(i1 [[I5]])
-; CHECK-NEXT: store volatile i32 [[B3]], ptr [[G1]], align 4
+; CHECK-NEXT: store volatile i32 2147483647, ptr [[G1]], align 4
; CHECK-NEXT: br label [[BB:%.*]]
; CHECK: BB:
; CHECK-NEXT: unreachable
diff --git a/llvm/test/Transforms/InstCombine/zext-or-icmp.ll b/llvm/test/Transforms/InstCombine/zext-or-icmp.ll
index 330ba126c6fa..23bfccfc06a9 100644
--- a/llvm/test/Transforms/InstCombine/zext-or-icmp.ll
+++ b/llvm/test/Transforms/InstCombine/zext-or-icmp.ll
@@ -184,11 +184,9 @@ define i8 @PR49475_infloop(i32 %t0, i16 %insert, i64 %e, i8 %i162) {
; CHECK-NEXT: [[CMP:%.*]] = icmp sle i64 [[CONV18]], [[XOR1]]
; CHECK-NEXT: [[CONV19:%.*]] = zext i1 [[CMP]] to i16
; CHECK-NEXT: [[OR21:%.*]] = or i16 [[CONV19]], [[INSERT]]
-; CHECK-NEXT: [[TRUNC44:%.*]] = trunc i16 [[OR21]] to i8
-; CHECK-NEXT: [[INC:%.*]] = or i8 [[TRUNC44]], [[I162]]
; CHECK-NEXT: [[TOBOOL23_NOT:%.*]] = icmp eq i16 [[OR21]], 0
; CHECK-NEXT: call void @llvm.assume(i1 [[TOBOOL23_NOT]])
-; CHECK-NEXT: ret i8 [[INC]]
+; CHECK-NEXT: ret i8 [[I162]]
;
%b = icmp eq i32 %t0, 0
%b2 = icmp eq i16 %insert, 0
More information about the llvm-commits
mailing list