[PATCH] D151969: [RISCV] Add RISCVISD nodes for vfwadd/vfwsub.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
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Add a DAG combine to form these from FADD_VL/FSUB_VL and FP_EXTEND_VL.

This makes it similar to other widening ops and allows us to handle
using the same FP_EXTEND_VL for both operands.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D151969

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
  llvm/test/CodeGen/RISCV/rvv/vfwadd-vp.ll

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