[PATCH] D151967: [RISCV] Improve selection for vector fpclass.

[Jianjian Guan via Phabricator via llvm-commits]

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Since vfclass intruction will only set one single bit in the result, so if we only want to check 1 fp class, we could use vmseq to do it.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D151967

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-vfclass.ll
  llvm/test/CodeGen/RISCV/rvv/vfclass-sdnode.ll

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