[llvm] 15a719d - [X86][MC] Use MCInstrDesc to access CondCode operand

[Amir Ayupov via llvm-commits]

Author: Amir Ayupov
Date: 2023-06-01T19:00:03-07:00
New Revision: 15a719de01b92da7de4b8381660525b622c2c292

URL: https://github.com/llvm/llvm-project/commit/15a719de01b92da7de4b8381660525b622c2c292
DIFF: https://github.com/llvm/llvm-project/commit/15a719de01b92da7de4b8381660525b622c2c292.diff

LOG: [X86][MC] Use MCInstrDesc to access CondCode operand

BOLT may add an extra MCOperand as annotation, making the number of operands in
MCInst different from MCInstrDesc information. A recent change broke our use as
the last operand is no longer a cond code.

Partially revert 287dd0142c08caad5b32628f3842dfd5d5c59d03 to rely on MCInstrDesc
to access CondCode operand.

Reviewed By: skan

Differential Revision: https://reviews.llvm.org/D151930

Added: 
    

Modified: 
    llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
index 0d575f24ee2eb..0427637c4c351 100644
--- a/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
+++ b/llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp
@@ -231,20 +231,23 @@ static unsigned getRelaxedOpcode(const MCInst &MI, bool Is16BitMode) {
                                    : X86::getOpcodeForLongImmediateForm(Opcode);
 }
 
-static X86::CondCode getCondFromBranch(const MCInst &MI) {
+static X86::CondCode getCondFromBranch(const MCInst &MI,
+                                       const MCInstrInfo &MCII) {
   unsigned Opcode = MI.getOpcode();
   switch (Opcode) {
   default:
     return X86::COND_INVALID;
-  case X86::JCC_1:
+  case X86::JCC_1: {
+    const MCInstrDesc &Desc = MCII.get(Opcode);
     return static_cast<X86::CondCode>(
-        MI.getOperand(MI.getNumOperands() - 1).getImm());
+        MI.getOperand(Desc.getNumOperands() - 1).getImm());
+  }
   }
 }
 
 static X86::SecondMacroFusionInstKind
-classifySecondInstInMacroFusion(const MCInst &MI) {
-  X86::CondCode CC = getCondFromBranch(MI);
+classifySecondInstInMacroFusion(const MCInst &MI, const MCInstrInfo &MCII) {
+  X86::CondCode CC = getCondFromBranch(MI, MCII);
   return classifySecondCondCodeInMacroFusion(CC);
 }
 
@@ -351,7 +354,7 @@ bool X86AsmBackend::isMacroFused(const MCInst &Cmp, const MCInst &Jcc) const {
   const X86::FirstMacroFusionInstKind CmpKind =
       X86::classifyFirstOpcodeInMacroFusion(Cmp.getOpcode());
   const X86::SecondMacroFusionInstKind BranchKind =
-      classifySecondInstInMacroFusion(Jcc);
+      classifySecondInstInMacroFusion(Jcc, *MCII);
   return X86::isMacroFused(CmpKind, BranchKind);
 }