[PATCH] D145163: Add support for vectorization of interleaved memory accesses for scalable VF

[Graham Hunter via Phabricator via llvm-commits]

huntergr updated this revision to Diff 527321.
huntergr added a comment.

Simplified size checking code, changed assert on interleave factor to occur before creating recipes.

The recipe constructor doesn't actually know the VF, so just confirming that the decision for a given scalable VF is to interleave only for factors of 2 should suffice. The code that performs interleaving is still effectively guarded by asserts in call construction that it has the correct number of arguments.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D145163/new/

https://reviews.llvm.org/D145163

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
  llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp
  llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
  llvm/test/Transforms/LoopVectorize/AArch64/scalable-strict-fadd.ll
  llvm/test/Transforms/LoopVectorize/AArch64/sve-interleaved-accesses.ll
  llvm/test/Transforms/LoopVectorize/AArch64/sve-widen-phi.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D145163.527321.patch
Type: text/x-patch
Size: 116087 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20230601/ee24bd54/attachment-0001.bin>