[PATCH] D149775: [AMDGPU] Reserve SGPR pair when long branches are present

[Pierre van Houtryve via Phabricator via llvm-commits]

Pierre-vh added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/GCNPreRABranchDistance.cpp:2
+//===-- GCNPreRABranchDistance.cpp
+//-----------------------------------------===//
+//
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formatting


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Comment at: llvm/lib/Target/AMDGPU/GCNPreRABranchDistance.cpp:178-180
+    int64_t DestOffset = BlockInfo[DestBB->getNumber()].Offset;
+    int64_t SrcOffset = getInstrOffset(*Last);
+    int64_t Offset =
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All of those are `unsigned` I think so I would use it here too to be consistent
There is also a use of `uint64_t` somewhere else



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Comment at: llvm/lib/Target/AMDGPU/SIFrameLowering.cpp:1453-1455
+    Register UnusedLowSGPR =
+        TRI->findUnusedRegister(MRI, &AMDGPU::SGPR_64RegClass, MF);
+    FuncInfo->setLongBranchReservedReg(UnusedLowSGPR);
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How does this work? Don't you need to check if `UnusedLowSGPR` returns something? Will it always return the pair we reserved earlier if nothing else is available?

Would it be worth adding a test with `amdgpu-num-sgpr` to see what happens when 100% of SGPRs are used?


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Comment at: llvm/test/CodeGen/MIR/AMDGPU/machine-function-info-long-branch-reg.ll:69
+attributes #1 = { nounwind readnone }
\ No newline at end of file

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missing newline


Repository:
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  https://reviews.llvm.org/D149775/new/

https://reviews.llvm.org/D149775