[PATCH] D151788: [APInt] Support zero-width extract in extractBitsAsZExtValue()

[Nikita Popov via Phabricator via llvm-commits]

This revision was automatically updated to reflect the committed changes.
Closed by commit rG42e98c6ae875: [APInt] Support zero-width extract in extractBitsAsZExtValue() (authored by nikic).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D151788/new/

https://reviews.llvm.org/D151788

Files:
  llvm/lib/Support/APInt.cpp
  llvm/unittests/ADT/APIntTest.cpp


Index: llvm/unittests/ADT/APIntTest.cpp
===================================================================
--- llvm/unittests/ADT/APIntTest.cpp
+++ llvm/unittests/ADT/APIntTest.cpp
@@ -3052,6 +3052,7 @@
   EXPECT_EQ(0U, APInt::getLowBitsSet(0, 0).getBitWidth());
   EXPECT_EQ(0U, APInt::getSplat(0, ZW).getBitWidth());
   EXPECT_EQ(0U, APInt(4, 10).extractBits(0, 2).getBitWidth());
+  EXPECT_EQ(0U, APInt(4, 10).extractBitsAsZExtValue(0, 2));
 
   // Logical operators.
   ZW |= ZW2;
Index: llvm/lib/Support/APInt.cpp
===================================================================
--- llvm/lib/Support/APInt.cpp
+++ llvm/lib/Support/APInt.cpp
@@ -479,7 +479,6 @@
 
 uint64_t APInt::extractBitsAsZExtValue(unsigned numBits,
                                        unsigned bitPosition) const {
-  assert(numBits > 0 && "Can't extract zero bits");
   assert(bitPosition < BitWidth && (numBits + bitPosition) <= BitWidth &&
          "Illegal bit extraction");
   assert(numBits <= 64 && "Illegal bit extraction");


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