[llvm] 42e98c6 - [APInt] Support zero-width extract in extractBitsAsZExtValue()

[Nikita Popov via llvm-commits]

Author: Nikita Popov
Date: 2023-05-31T17:13:48+02:00
New Revision: 42e98c6ae875e952ee852f78234c0f8ed311472b

URL: https://github.com/llvm/llvm-project/commit/42e98c6ae875e952ee852f78234c0f8ed311472b
DIFF: https://github.com/llvm/llvm-project/commit/42e98c6ae875e952ee852f78234c0f8ed311472b.diff

LOG: [APInt] Support zero-width extract in extractBitsAsZExtValue()

D111241 added support for extractBits() with zero width. Extend this
to extractBitsAsZExtValue() as well for consistency (in which case
it will always return zero).

Differential Revision: https://reviews.llvm.org/D151788

Added: 
    

Modified: 
    llvm/lib/Support/APInt.cpp
    llvm/unittests/ADT/APIntTest.cpp

Removed: 
    


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diff  --git a/llvm/lib/Support/APInt.cpp b/llvm/lib/Support/APInt.cpp
index bc27e9df13505..bd8358c787259 100644
--- a/llvm/lib/Support/APInt.cpp
+++ b/llvm/lib/Support/APInt.cpp
@@ -479,7 +479,6 @@ APInt APInt::extractBits(unsigned numBits, unsigned bitPosition) const {
 
 uint64_t APInt::extractBitsAsZExtValue(unsigned numBits,
                                        unsigned bitPosition) const {
-  assert(numBits > 0 && "Can't extract zero bits");
   assert(bitPosition < BitWidth && (numBits + bitPosition) <= BitWidth &&
          "Illegal bit extraction");
   assert(numBits <= 64 && "Illegal bit extraction");

diff  --git a/llvm/unittests/ADT/APIntTest.cpp b/llvm/unittests/ADT/APIntTest.cpp
index b8cf48c0ee4d1..a9993acec307d 100644
--- a/llvm/unittests/ADT/APIntTest.cpp
+++ b/llvm/unittests/ADT/APIntTest.cpp
@@ -3052,6 +3052,7 @@ TEST(APIntTest, ZeroWidth) {
   EXPECT_EQ(0U, APInt::getLowBitsSet(0, 0).getBitWidth());
   EXPECT_EQ(0U, APInt::getSplat(0, ZW).getBitWidth());
   EXPECT_EQ(0U, APInt(4, 10).extractBits(0, 2).getBitWidth());
+  EXPECT_EQ(0U, APInt(4, 10).extractBitsAsZExtValue(0, 2));
 
   // Logical operators.
   ZW |= ZW2;