[llvm] ac1df22 - [RISCV] Merge emitDirectiveOptionArchPlus and emitDirectiveOptionArchMinus into a single interface. NFC
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Tue May 30 22:53:25 PDT 2023
Author: Craig Topper
Date: 2023-05-30T22:45:42-07:00
New Revision: ac1df22315a55c799239090097b6d6e0e9a916d8
URL: https://github.com/llvm/llvm-project/commit/ac1df22315a55c799239090097b6d6e0e9a916d8
DIFF: https://github.com/llvm/llvm-project/commit/ac1df22315a55c799239090097b6d6e0e9a916d8.diff
LOG: [RISCV] Merge emitDirectiveOptionArchPlus and emitDirectiveOptionArchMinus into a single interface. NFC
Probably going to do some other refactors after this, but this one
was easy and clearly reduces duplicate code.
Reviewed By: StephenFan
Differential Revision: https://reviews.llvm.org/D151771
Added:
Modified:
llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h
Removed:
################################################################################
diff --git a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
index e012907a95f08..6006a133ddae1 100644
--- a/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
+++ b/llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
@@ -2782,8 +2782,8 @@ bool RISCVAsmParser::parseDirectiveOption() {
return Error(Loc, OutputErrMsg.str());
}
- getTargetStreamer().emitDirectiveOptionArchPlus(Ext->Key, PrefixEmitted,
- HasComma);
+ getTargetStreamer().emitDirectiveOptionArchPlusOrMinus(
+ Ext->Key, /*Enable*/ true, PrefixEmitted, HasComma);
} else {
// It is invalid to disable an extension that there are other enabled
// extensions depend on it.
@@ -2798,8 +2798,8 @@ bool RISCVAsmParser::parseDirectiveOption() {
}
clearFeatureBits(Ext->Value, Ext->Key);
- getTargetStreamer().emitDirectiveOptionArchMinus(
- Ext->Key, PrefixEmitted, HasComma);
+ getTargetStreamer().emitDirectiveOptionArchPlusOrMinus(
+ Ext->Key, /*Enable*/ false, PrefixEmitted, HasComma);
}
if (!HasComma)
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
index 3c8c704ef54e7..28e7fc6157c3a 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp
@@ -35,13 +35,10 @@ void RISCVTargetStreamer::emitDirectiveOptionRelax() {}
void RISCVTargetStreamer::emitDirectiveOptionNoRelax() {}
void RISCVTargetStreamer::emitDirectiveVariantCC(MCSymbol &Symbol) {}
void RISCVTargetStreamer::emitDirectiveOptionArchFullArch(StringRef Value,
- bool &hasDotOption) {}
-void RISCVTargetStreamer::emitDirectiveOptionArchPlus(StringRef Value,
- bool &hasDotOption,
- bool EmitComma) {}
-void RISCVTargetStreamer::emitDirectiveOptionArchMinus(StringRef Value,
- bool &hasDotOption,
- bool EmitComma) {}
+ bool &PrefixEmitted) {
+}
+void RISCVTargetStreamer::emitDirectiveOptionArchPlusOrMinus(
+ StringRef Value, bool Enable, bool &PrefixEmitted, bool EmitComma) {}
void RISCVTargetStreamer::emitAttribute(unsigned Attribute, unsigned Value) {}
void RISCVTargetStreamer::finishAttributeSection() {}
void RISCVTargetStreamer::emitTextAttribute(unsigned Attribute,
@@ -147,18 +144,11 @@ void RISCVTargetAsmStreamer::emitDirectiveOptionArchFullArch(
OS << Value;
emitCommaOrNextLine(OS, false);
}
-void RISCVTargetAsmStreamer::emitDirectiveOptionArchPlus(StringRef Value,
- bool &PrefixEmitted,
- bool EmitComma) {
- emitDirectiveOptionArchPrefix(OS, PrefixEmitted);
- OS << "+" << Value;
- emitCommaOrNextLine(OS, EmitComma);
-}
-void RISCVTargetAsmStreamer::emitDirectiveOptionArchMinus(StringRef Value,
- bool &PrefixEmitted,
- bool EmitComma) {
+
+void RISCVTargetAsmStreamer::emitDirectiveOptionArchPlusOrMinus(
+ StringRef Value, bool Enable, bool &PrefixEmitted, bool EmitComma) {
emitDirectiveOptionArchPrefix(OS, PrefixEmitted);
- OS << "-" << Value;
+ OS << (Enable ? "+" : "-") << Value;
emitCommaOrNextLine(OS, EmitComma);
}
diff --git a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h
index 48da70503fcc8..4baed99364b00 100644
--- a/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h
+++ b/llvm/lib/Target/RISCV/MCTargetDesc/RISCVTargetStreamer.h
@@ -36,11 +36,9 @@ class RISCVTargetStreamer : public MCTargetStreamer {
virtual void emitDirectiveVariantCC(MCSymbol &Symbol);
virtual void emitDirectiveOptionArchFullArch(StringRef Value,
bool &PrefixEmitted);
- virtual void emitDirectiveOptionArchPlus(StringRef Value, bool &PrefixEmitted,
- bool EmitComma);
- virtual void emitDirectiveOptionArchMinus(StringRef Value,
- bool &PrefixEmitted,
- bool EmitComma);
+ virtual void emitDirectiveOptionArchPlusOrMinus(StringRef Value, bool Enable,
+ bool &PrefixEmitted,
+ bool EmitComma);
virtual void emitAttribute(unsigned Attribute, unsigned Value);
virtual void finishAttributeSection();
virtual void emitTextAttribute(unsigned Attribute, StringRef String);
@@ -76,10 +74,9 @@ class RISCVTargetAsmStreamer : public RISCVTargetStreamer {
void emitDirectiveVariantCC(MCSymbol &Symbol) override;
void emitDirectiveOptionArchFullArch(StringRef Value,
bool &PrefixEmitted) override;
- void emitDirectiveOptionArchPlus(StringRef Value, bool &PrefixEmitted,
- bool EmitComma) override;
- void emitDirectiveOptionArchMinus(StringRef Value, bool &PrefixEmitted,
- bool EmitComma) override;
+ void emitDirectiveOptionArchPlusOrMinus(StringRef Value, bool Enable,
+ bool &PrefixEmitted,
+ bool EmitComma) override;
};
}
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