[PATCH] D151778: [X86][BF16] Split vNbf16 vectors according to vNf16
Phoebe Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue May 30 22:31:45 PDT 2023
pengfei created this revision.
pengfei added reviewers: RKSimon, LuoYuanke, bkramer, craig.topper.
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Fixes #63017
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D151778
Files:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/bfloat.ll
Index: llvm/test/CodeGen/X86/bfloat.ll
===================================================================
--- llvm/test/CodeGen/X86/bfloat.ll
+++ llvm/test/CodeGen/X86/bfloat.ll
@@ -565,3 +565,19 @@
%2 = insertelement <2 x bfloat> %1, bfloat %b, i64 1
ret <2 x bfloat> %2
}
+
+define <32 x bfloat> @pr63017() {
+; SSE2-LABEL: pr63017:
+; SSE2: # %bb.0:
+; SSE2-NEXT: xorps %xmm0, %xmm0
+; SSE2-NEXT: xorps %xmm1, %xmm1
+; SSE2-NEXT: xorps %xmm2, %xmm2
+; SSE2-NEXT: xorps %xmm3, %xmm3
+; SSE2-NEXT: retq
+;
+; BF16-LABEL: pr63017:
+; BF16: # %bb.0:
+; BF16-NEXT: vxorps %xmm0, %xmm0, %xmm0
+; BF16-NEXT: retq
+ ret <32 x bfloat> zeroinitializer
+}
Index: llvm/lib/Target/X86/X86ISelLowering.cpp
===================================================================
--- llvm/lib/Target/X86/X86ISelLowering.cpp
+++ llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -2668,6 +2668,10 @@
return 2;
}
+ // Split vNbf16 vectors according to vNf16.
+ if (VT.isVector() && VT.getVectorElementType() == MVT::bf16)
+ VT = VT.changeVectorElementType(MVT::f16);
+
return TargetLowering::getVectorTypeBreakdownForCallingConv(Context, CC, VT, IntermediateVT,
NumIntermediates, RegisterVT);
}
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