[PATCH] D151719: [RISCV] Add special case for (select cc, 1.0, 0.0) to lowerSELECT

Liao Chunyu via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue May 30 22:28:13 PDT 2023


liaolucy updated this revision to Diff 526903.
liaolucy edited the summary of this revision.
liaolucy added a comment.

Using xor to replace setcc.
A DAGCombine patch may be needed here. I can send a new patch.

  +++ b/llvm/test/CodeGen/RISCV/half-select-icmp.ll
  @@ -510,26 +510,30 @@ define half @select_icmp_slt_one(i32 signext %a) {
   define half @select_icmp_sgt_zero(i32 signext %a) {
   ; CHECK-LABEL: select_icmp_sgt_zero:
   ; CHECK:       # %bb.0:
  -; CHECK-NEXT:    slti a0, a0, 1
  +; CHECK-NEXT:    sgtz a0, a0
  +; CHECK-NEXT:    xori a0, a0, 1
   ; CHECK-NEXT:    fcvt.h.w fa0, a0
   ; CHECK-NEXT:    ret


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D151719/new/

https://reviews.llvm.org/D151719

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/double-select-icmp.ll
  llvm/test/CodeGen/RISCV/float-select-icmp.ll
  llvm/test/CodeGen/RISCV/half-select-icmp.ll

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