[PATCH] D150991: [LV] Use Legal::isUniform to detect uniform pointers.
Florian Hahn via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue May 30 08:46:05 PDT 2023
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG8098f2577efa: [LV] Use Legal::isUniform to detect uniform pointers. (authored by fhahn).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D150991/new/
https://reviews.llvm.org/D150991
Files:
llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
llvm/test/Transforms/LoopVectorize/skeleton-lcssa-crash.ll
Index: llvm/test/Transforms/LoopVectorize/skeleton-lcssa-crash.ll
===================================================================
--- llvm/test/Transforms/LoopVectorize/skeleton-lcssa-crash.ll
+++ llvm/test/Transforms/LoopVectorize/skeleton-lcssa-crash.ll
@@ -50,13 +50,11 @@
; CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds i16, ptr [[TMP5]], i32 0
; CHECK-NEXT: [[WIDE_LOAD:%.*]] = load <2 x i16>, ptr [[TMP6]], align 2, !alias.scope !0
; CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds i16, ptr [[L_2]], i64 0
-; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x i16> [[WIDE_LOAD]], i32 0
+; CHECK-NEXT: [[TMP8:%.*]] = extractelement <2 x i16> [[WIDE_LOAD]], i32 1
; CHECK-NEXT: store i16 [[TMP8]], ptr [[TMP7]], align 2, !alias.scope !3, !noalias !0
-; CHECK-NEXT: [[TMP9:%.*]] = extractelement <2 x i16> [[WIDE_LOAD]], i32 1
-; CHECK-NEXT: store i16 [[TMP9]], ptr [[TMP7]], align 2, !alias.scope !3, !noalias !0
; CHECK-NEXT: [[INDEX_NEXT]] = add nuw i64 [[INDEX]], 2
-; CHECK-NEXT: [[TMP10:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
-; CHECK-NEXT: br i1 [[TMP10]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
+; CHECK-NEXT: [[TMP9:%.*]] = icmp eq i64 [[INDEX_NEXT]], [[N_VEC]]
+; CHECK-NEXT: br i1 [[TMP9]], label [[MIDDLE_BLOCK:%.*]], label [[VECTOR_BODY]], !llvm.loop [[LOOP5:![0-9]+]]
; CHECK: middle.block:
; CHECK-NEXT: [[CMP_N:%.*]] = icmp eq i64 [[TMP0]], [[N_VEC]]
; CHECK-NEXT: br i1 [[CMP_N]], label [[EXIT_LOOPEXIT:%.*]], label [[SCALAR_PH]]
Index: llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
===================================================================
--- llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
+++ llvm/test/Transforms/LoopVectorize/AArch64/pr60831-sve-inv-store-crash.ll
@@ -3,9 +3,6 @@
target triple = "aarch64-unknown-linux-gnu"
-; REQUIRES: asserts
-; XFAIL: *
-
; Test cases for PR60831.
define void @test_invar_gep(ptr %dst) #0 {
Index: llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
===================================================================
--- llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
+++ llvm/lib/Transforms/Vectorize/LoopVectorize.cpp
@@ -4703,7 +4703,8 @@
auto isVectorizedMemAccessUse = [&](Instruction *I, Value *Ptr) -> bool {
if (isa<StoreInst>(I) && I->getOperand(0) == Ptr)
return false;
- return getLoadStorePointerOperand(I) == Ptr && isUniformDecision(I, VF);
+ return getLoadStorePointerOperand(I) == Ptr &&
+ (isUniformDecision(I, VF) || Legal->isUniform(Ptr));
};
// Holds a list of values which are known to have at least one uniform use.
@@ -4749,10 +4750,8 @@
if (isUniformMemOpUse(&I))
addToWorklistIfAllowed(&I);
- if (isVectorizedMemAccessUse(&I, Ptr)) {
- assert(isUniformDecision(&I, VF) && "consistency check");
+ if (isVectorizedMemAccessUse(&I, Ptr))
HasUniformUse.insert(Ptr);
- }
}
// Add to the worklist any operands which have *only* uniform (e.g. lane 0
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