[PATCH] D150949: [X86] Remove patterns for ADD/AND/OR/SUB/XOR/CMP with immediate 8 and optimize during MC lowering, NFCI

[Kan Shengchen via Phabricator via llvm-commits]

skan added a comment.

This change is straightforward to me. I tend to land it first to avoid more tests for ADD/AND/OR/SUB/XOR/CMP with i8 being added. The update in `llvm/test/CodeGen/X86/avxvnni-combine.ll` is due to the impact on machine schedule.
Opened a revision here for possible discussions.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D150949/new/

https://reviews.llvm.org/D150949