[PATCH] D149383: [SelectionDAG][WIP] Add support for evaluating SetCC based on knownbits
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu May 18 10:21:13 PDT 2023
RKSimon requested changes to this revision.
RKSimon added a comment.
This revision now requires changes to proceed.
There's still a lot of tests in here that need adjusting so that they still test what we want them to test
================
Comment at: llvm/test/CodeGen/X86/fold-rmw-ops.ll:1372
store i64 %or, ptr @g64
%cond = icmp eq i64 %or, 0
br i1 %cond, label %a, label %b
----------------
goldstein.w.n wrote:
> RKSimon wrote:
> > goldstein.w.n wrote:
> > > RKSimon wrote:
> > > > comparing against zero in all these or-with-imm tests just seems to be a copy+paste from the other logic ops in this file - maybe change it to something that isn't constant foldable (test for -ve?)
> > > re: 'test for -ve?' hmm?
> > >
> > > But would generally prefer to add new tests than modify existing.
> > 'test for -ve' === 'test for negative'
> >
> > Adding additional tests would be fine.
> As in add a new test file? This isn't a new file for the series, its just affected by the change.
I'd prefer that these tests were adjusted, the icmp_eq vs 0 was just a dumb copy + paste - but if you don't want to do that, duplicating these OR tests immediately below with a icmp_sgt 0 would be OK
================
Comment at: llvm/test/CodeGen/X86/hoist-and-by-const-from-shl-in-eqcmp-zero.ll:801
+; X64-NEXT: xorl %eax, %eax
; X64-NEXT: retq
%t0 = shl i8 128, %y
----------------
this needs adjusting
================
Comment at: llvm/test/CodeGen/X86/or-with-overflow.ll:6
;
; PR48768 - 'or' clears the overflow flag, so we don't need a separate 'test'.
;
----------------
All these tests need adjusting
================
Comment at: llvm/test/CodeGen/X86/pr16031.ll:9
; CHECK-NEXT: xorl %edx, %edx
; CHECK-NEXT: retl
entry:
----------------
not sure what to do with this test - either we try to fix it so it still matches what the original bug was about, or we delete it
================
Comment at: llvm/test/CodeGen/X86/shrink-compare.ll:128
+; CHECK-NEXT: movb $1, %al
+; CHECK-NEXT: testb %al, %al
; CHECK-NEXT: je bar # TAILCALL
----------------
This is no longer a shrink-compare test
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D149383/new/
https://reviews.llvm.org/D149383
More information about the llvm-commits
mailing list