[PATCH] D149711: [PowerPC] Remove asserts from the disassembler.
    Sergei Barannikov via Phabricator via llvm-commits 
    llvm-commits at lists.llvm.org
       
    Thu May 18 07:49:42 PDT 2023
    
    
  
barannikov88 added inline comments.
================
Comment at: llvm/lib/Target/PowerPC/Disassembler/PPCDisassembler.cpp:118
                                             const MCDisassembler *Decoder) {
-  assert(RegNo <= 30 && "Expecting a register number no more than 30.");
-  assert((RegNo & 1) == 0 && "Expecting an even register number.");
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shchenz wrote:
> Little confused. From the function name and its parameter seems like this function should only be called for instructions. Is it possible that there is a wrong call to this function? For example, for data, we should not decode fpr RC as there is no RC for data at all?
The removed assertion should have been changed to `if (...) return DecodeStatus::Fail;` so that random data is not decoded into invalid instructions.
The added test should be a negative one.
Repository:
  rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D149711/new/
https://reviews.llvm.org/D149711
    
    
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