[PATCH] D150717: [RISCV] Use scalar stores for splats of zero to memory up to XLen

[Luke Lau via Phabricator via llvm-commits]

luke added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:12189
+      auto NewVT = MVT::getIntegerVT(MemVT.getSizeInBits());
+      if (allowsMemoryAccessForAlignment(*DAG.getContext(), DAG.getDataLayout(),
+                                         NewVT, *Store->getMemOperand())) {
----------------
Do we want to check if the memory access is fast? Currently we always report unaligned scalar accesses as slow, but that sounds like it's at odds with this combine

```
bool RISCVTargetLowering::allowsMisalignedMemoryAccesses(
    EVT VT, unsigned AddrSpace, Align Alignment, MachineMemOperand::Flags Flags,
    unsigned *Fast) const {
  if (!VT.isVector()) {
    if (Fast)
      *Fast = 0;
    return Subtarget.enableUnalignedScalarMem();
  }
```


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D150717/new/

https://reviews.llvm.org/D150717