[PATCH] D150311: [MISched] Use StartAtCycle in trace dumps.

Andrea Di Biagio via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri May 12 04:24:16 PDT 2023


andreadb added inline comments.


================
Comment at: llvm/lib/CodeGen/MachineScheduler.cpp:164
+static cl::opt<bool> MISchedSortResourcesInTrace(
+    "misched-sort-respources-in-trace", cl::Hidden, cl::init(false),
+    cl::desc("Sort the resources printed in the dump trace"));
----------------
s/respource/resource


================
Comment at: llvm/lib/CodeGen/MachineScheduler.cpp:1000-1005
+    std::vector<TargetSchedModel::ProcResIter> ResourcesIt;
     for (TargetSchedModel::ProcResIter PI = SchedModel.getWriteProcResBegin(SC),
                                        PE = SchedModel.getWriteProcResEnd(SC);
          PI != PE; ++PI) {
+      ResourcesIt.push_back(PI);
+    }
----------------
What if you use a SmallVector here?
I may remember it wrongly, but I think that there is a constructor which would allow you to pass an iterator range.


================
Comment at: llvm/lib/CodeGen/MachineScheduler.cpp:1023
       }
-      for (unsigned i = 0; i < PI->Cycles; ++i, ++C)
+      assert(PI->StartAtCycle < PI->Cycles && "Invalid resource usage");
+      for (unsigned i = 0; i < (PI->Cycles - PI->StartAtCycle); ++i, ++C)
----------------
Can this assert ever trigger in practice? I thought it was already tested by your logic from D150310.


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