[PATCH] D150415: [RISCV] Add a pass to merge moving parameter registers instructions for Zcmp

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.cpp:1296-1305
+  case RISCV::ADD:
+    if (!MI.getOperand(1).isReg() || !MI.getOperand(2).isReg())
+      break;
+    if ((MI.getOperand(1).getReg() == RISCV::X0) &&
+        (MI.getOperand(2).getReg() != RISCV::X0))
+      return DestSourcePair{MI.getOperand(0), MI.getOperand(2)};
+    if ((MI.getOperand(1).getReg() != RISCV::X0) &&
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kito-cheng wrote:
> This change seems right, but that should be a separated patch :)
Do we ever create such instructions?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D150415/new/

https://reviews.llvm.org/D150415