[PATCH] D150142: [InstCombine] Add simplifications for div/rem with `i1` operands; PR62607

[Noah Goldstein via Phabricator via llvm-commits]

goldstein.w.n added a comment.

In D150142#4327705 <https://reviews.llvm.org/D150142#4327705>, @nikic wrote:

> Missing InstSim plify tests. The check for this was dropped as part of https://github.com/llvm/llvm-project/commit/946b32680311f43a349d0199f9e286f385cd9847, and apparently had no test coverage? Though I don't really get why the new KnownBits based code doesn't cover this: For i1 type I'd expect `Known.countMinLeadingZeros() == Known.getBitWidth() - 1` to evaluate to true?

Its because the denominator is known-zero (at least in the case from the bugreport):

  Known.Zero: 1
  Known.One: 0 
  Known.countMinLeadingZeros(): 1
  Known.getBitWidth(): 1

So actually this patch should probably be returning poison?


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https://reviews.llvm.org/D150142