[PATCH] D150142: [InstCombine] Add simplifications for div/rem with `i1` operands; PR62607

[Noah Goldstein via Phabricator via llvm-commits]

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This is generally handled already in early CSE and/or generically with
valuetracking.

`InstCombine` assumes that div/rem with `i1` operands will have
already been handled which is not always the case if a non-standard
pipeline is being used:
https://github.com/llvm/llvm-project/issues/62607

This just adds `i1` handling to `InstructionSimplify` so that
`InstCombine's` assumptions are fulfilled by itself.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D150142

Files:
  llvm/lib/Analysis/InstructionSimplify.cpp
  llvm/test/Transforms/InstCombine/pr62607.ll

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