[llvm] d53b76e - [X86] vector-reduce-or-bool.ll - add common AVX prefix
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Mon May 8 07:30:53 PDT 2023
Author: Simon Pilgrim
Date: 2023-05-08T15:30:41+01:00
New Revision: d53b76e3dd6eafc32fee0bd7b72ec39b8e7686a6
URL: https://github.com/llvm/llvm-project/commit/d53b76e3dd6eafc32fee0bd7b72ec39b8e7686a6
DIFF: https://github.com/llvm/llvm-project/commit/d53b76e3dd6eafc32fee0bd7b72ec39b8e7686a6.diff
LOG: [X86] vector-reduce-or-bool.ll - add common AVX prefix
Share with AVX512 to reduce duplication
Added:
Modified:
llvm/test/CodeGen/X86/vector-reduce-or-bool.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/X86/vector-reduce-or-bool.ll b/llvm/test/CodeGen/X86/vector-reduce-or-bool.ll
index 815ba225ccbf..249dc10f52cf 100644
--- a/llvm/test/CodeGen/X86/vector-reduce-or-bool.ll
+++ b/llvm/test/CodeGen/X86/vector-reduce-or-bool.ll
@@ -1,11 +1,11 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefixes=SSE,SSE2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefixes=SSE,SSE41
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX2
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX512,AVX512F
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX512,AVX512BW
-; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX512,AVX512VL
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX1
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefixes=AVX,AVX1OR2,AVX2
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f | FileCheck %s --check-prefixes=AVX,AVX512,AVX512F
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefixes=AVX,AVX512,AVX512BW
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefixes=AVX,AVX512,AVX512VL
;
; Truncate
@@ -26,11 +26,11 @@ define i1 @trunc_v2i64_v2i1(<2 x i64>) {
; SSE41-NEXT: setne %al
; SSE41-NEXT: retq
;
-; AVX-LABEL: trunc_v2i64_v2i1:
-; AVX: # %bb.0:
-; AVX-NEXT: vptest {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
-; AVX-NEXT: setne %al
-; AVX-NEXT: retq
+; AVX1OR2-LABEL: trunc_v2i64_v2i1:
+; AVX1OR2: # %bb.0:
+; AVX1OR2-NEXT: vptest {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
+; AVX1OR2-NEXT: setne %al
+; AVX1OR2-NEXT: retq
;
; AVX512F-LABEL: trunc_v2i64_v2i1:
; AVX512F: # %bb.0:
@@ -114,12 +114,6 @@ define i1 @trunc_v8i16_v8i1(<8 x i16>) {
; AVX-NEXT: vptest {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; AVX-NEXT: setne %al
; AVX-NEXT: retq
-;
-; AVX512-LABEL: trunc_v8i16_v8i1:
-; AVX512: # %bb.0:
-; AVX512-NEXT: vptest {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
-; AVX512-NEXT: setne %al
-; AVX512-NEXT: retq
%a = trunc <8 x i16> %0 to <8 x i1>
%b = call i1 @llvm.vector.reduce.or.v8i1(<8 x i1> %a)
ret i1 %b
@@ -145,12 +139,6 @@ define i1 @trunc_v16i8_v16i1(<16 x i8>) {
; AVX-NEXT: vptest {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
; AVX-NEXT: setne %al
; AVX-NEXT: retq
-;
-; AVX512-LABEL: trunc_v16i8_v16i1:
-; AVX512: # %bb.0:
-; AVX512-NEXT: vptest {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %xmm0
-; AVX512-NEXT: setne %al
-; AVX512-NEXT: retq
%a = trunc <16 x i8> %0 to <16 x i1>
%b = call i1 @llvm.vector.reduce.or.v16i1(<16 x i1> %a)
ret i1 %b
@@ -267,13 +255,6 @@ define i1 @trunc_v16i16_v16i1(<16 x i16>) {
; AVX-NEXT: setne %al
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
-;
-; AVX512-LABEL: trunc_v16i16_v16i1:
-; AVX512: # %bb.0:
-; AVX512-NEXT: vptest {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0
-; AVX512-NEXT: setne %al
-; AVX512-NEXT: vzeroupper
-; AVX512-NEXT: retq
%a = trunc <16 x i16> %0 to <16 x i1>
%b = call i1 @llvm.vector.reduce.or.v16i1(<16 x i1> %a)
ret i1 %b
@@ -302,13 +283,6 @@ define i1 @trunc_v32i8_v32i1(<32 x i8>) {
; AVX-NEXT: setne %al
; AVX-NEXT: vzeroupper
; AVX-NEXT: retq
-;
-; AVX512-LABEL: trunc_v32i8_v32i1:
-; AVX512: # %bb.0:
-; AVX512-NEXT: vptest {{\.?LCPI[0-9]+_[0-9]+}}(%rip), %ymm0
-; AVX512-NEXT: setne %al
-; AVX512-NEXT: vzeroupper
-; AVX512-NEXT: retq
%a = trunc <32 x i8> %0 to <32 x i1>
%b = call i1 @llvm.vector.reduce.or.v32i1(<32 x i1> %a)
ret i1 %b
@@ -546,13 +520,13 @@ define i1 @icmp0_v2i64_v2i1(<2 x i64>) {
; SSE41-NEXT: setne %al
; SSE41-NEXT: retq
;
-; AVX-LABEL: icmp0_v2i64_v2i1:
-; AVX: # %bb.0:
-; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0
-; AVX-NEXT: vtestpd %xmm0, %xmm0
-; AVX-NEXT: setne %al
-; AVX-NEXT: retq
+; AVX1OR2-LABEL: icmp0_v2i64_v2i1:
+; AVX1OR2: # %bb.0:
+; AVX1OR2-NEXT: vpxor %xmm1, %xmm1, %xmm1
+; AVX1OR2-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0
+; AVX1OR2-NEXT: vtestpd %xmm0, %xmm0
+; AVX1OR2-NEXT: setne %al
+; AVX1OR2-NEXT: retq
;
; AVX512F-LABEL: icmp0_v2i64_v2i1:
; AVX512F: # %bb.0:
@@ -596,13 +570,13 @@ define i1 @icmp0_v4i32_v4i1(<4 x i32>) {
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
-; AVX-LABEL: icmp0_v4i32_v4i1:
-; AVX: # %bb.0:
-; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
-; AVX-NEXT: vtestps %xmm0, %xmm0
-; AVX-NEXT: setne %al
-; AVX-NEXT: retq
+; AVX1OR2-LABEL: icmp0_v4i32_v4i1:
+; AVX1OR2: # %bb.0:
+; AVX1OR2-NEXT: vpxor %xmm1, %xmm1, %xmm1
+; AVX1OR2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
+; AVX1OR2-NEXT: vtestps %xmm0, %xmm0
+; AVX1OR2-NEXT: setne %al
+; AVX1OR2-NEXT: retq
;
; AVX512F-LABEL: icmp0_v4i32_v4i1:
; AVX512F: # %bb.0:
@@ -646,14 +620,14 @@ define i1 @icmp0_v8i16_v8i1(<8 x i16>) {
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
-; AVX-LABEL: icmp0_v8i16_v8i1:
-; AVX: # %bb.0:
-; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0
-; AVX-NEXT: vpmovmskb %xmm0, %eax
-; AVX-NEXT: testl %eax, %eax
-; AVX-NEXT: setne %al
-; AVX-NEXT: retq
+; AVX1OR2-LABEL: icmp0_v8i16_v8i1:
+; AVX1OR2: # %bb.0:
+; AVX1OR2-NEXT: vpxor %xmm1, %xmm1, %xmm1
+; AVX1OR2-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0
+; AVX1OR2-NEXT: vpmovmskb %xmm0, %eax
+; AVX1OR2-NEXT: testl %eax, %eax
+; AVX1OR2-NEXT: setne %al
+; AVX1OR2-NEXT: retq
;
; AVX512F-LABEL: icmp0_v8i16_v8i1:
; AVX512F: # %bb.0:
@@ -698,14 +672,14 @@ define i1 @icmp0_v16i8_v16i1(<16 x i8>) {
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
-; AVX-LABEL: icmp0_v16i8_v16i1:
-; AVX: # %bb.0:
-; AVX-NEXT: vpxor %xmm1, %xmm1, %xmm1
-; AVX-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0
-; AVX-NEXT: vpmovmskb %xmm0, %eax
-; AVX-NEXT: testl %eax, %eax
-; AVX-NEXT: setne %al
-; AVX-NEXT: retq
+; AVX1OR2-LABEL: icmp0_v16i8_v16i1:
+; AVX1OR2: # %bb.0:
+; AVX1OR2-NEXT: vpxor %xmm1, %xmm1, %xmm1
+; AVX1OR2-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0
+; AVX1OR2-NEXT: vpmovmskb %xmm0, %eax
+; AVX1OR2-NEXT: testl %eax, %eax
+; AVX1OR2-NEXT: setne %al
+; AVX1OR2-NEXT: retq
;
; AVX512F-LABEL: icmp0_v16i8_v16i1:
; AVX512F: # %bb.0:
@@ -1353,12 +1327,12 @@ define i1 @icmp_v2i64_v2i1(<2 x i64>, <2 x i64>) {
; SSE41-NEXT: setne %al
; SSE41-NEXT: retq
;
-; AVX-LABEL: icmp_v2i64_v2i1:
-; AVX: # %bb.0:
-; AVX-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0
-; AVX-NEXT: vtestpd %xmm0, %xmm0
-; AVX-NEXT: setne %al
-; AVX-NEXT: retq
+; AVX1OR2-LABEL: icmp_v2i64_v2i1:
+; AVX1OR2: # %bb.0:
+; AVX1OR2-NEXT: vpcmpeqq %xmm1, %xmm0, %xmm0
+; AVX1OR2-NEXT: vtestpd %xmm0, %xmm0
+; AVX1OR2-NEXT: setne %al
+; AVX1OR2-NEXT: retq
;
; AVX512F-LABEL: icmp_v2i64_v2i1:
; AVX512F: # %bb.0:
@@ -1403,12 +1377,12 @@ define i1 @icmp_v4i32_v4i1(<4 x i32>, <4 x i32>) {
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
-; AVX-LABEL: icmp_v4i32_v4i1:
-; AVX: # %bb.0:
-; AVX-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
-; AVX-NEXT: vtestps %xmm0, %xmm0
-; AVX-NEXT: setne %al
-; AVX-NEXT: retq
+; AVX1OR2-LABEL: icmp_v4i32_v4i1:
+; AVX1OR2: # %bb.0:
+; AVX1OR2-NEXT: vpcmpeqd %xmm1, %xmm0, %xmm0
+; AVX1OR2-NEXT: vtestps %xmm0, %xmm0
+; AVX1OR2-NEXT: setne %al
+; AVX1OR2-NEXT: retq
;
; AVX512F-LABEL: icmp_v4i32_v4i1:
; AVX512F: # %bb.0:
@@ -1453,13 +1427,13 @@ define i1 @icmp_v8i16_v8i1(<8 x i16>, <8 x i16>) {
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
-; AVX-LABEL: icmp_v8i16_v8i1:
-; AVX: # %bb.0:
-; AVX-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0
-; AVX-NEXT: vpmovmskb %xmm0, %eax
-; AVX-NEXT: testl %eax, %eax
-; AVX-NEXT: setne %al
-; AVX-NEXT: retq
+; AVX1OR2-LABEL: icmp_v8i16_v8i1:
+; AVX1OR2: # %bb.0:
+; AVX1OR2-NEXT: vpcmpeqw %xmm1, %xmm0, %xmm0
+; AVX1OR2-NEXT: vpmovmskb %xmm0, %eax
+; AVX1OR2-NEXT: testl %eax, %eax
+; AVX1OR2-NEXT: setne %al
+; AVX1OR2-NEXT: retq
;
; AVX512F-LABEL: icmp_v8i16_v8i1:
; AVX512F: # %bb.0:
@@ -1503,13 +1477,13 @@ define i1 @icmp_v16i8_v16i1(<16 x i8>, <16 x i8>) {
; SSE-NEXT: setne %al
; SSE-NEXT: retq
;
-; AVX-LABEL: icmp_v16i8_v16i1:
-; AVX: # %bb.0:
-; AVX-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0
-; AVX-NEXT: vpmovmskb %xmm0, %eax
-; AVX-NEXT: testl %eax, %eax
-; AVX-NEXT: setne %al
-; AVX-NEXT: retq
+; AVX1OR2-LABEL: icmp_v16i8_v16i1:
+; AVX1OR2: # %bb.0:
+; AVX1OR2-NEXT: vpcmpeqb %xmm1, %xmm0, %xmm0
+; AVX1OR2-NEXT: vpmovmskb %xmm0, %eax
+; AVX1OR2-NEXT: testl %eax, %eax
+; AVX1OR2-NEXT: setne %al
+; AVX1OR2-NEXT: retq
;
; AVX512F-LABEL: icmp_v16i8_v16i1:
; AVX512F: # %bb.0:
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