[llvm] 1d21d2e - [TargetLowering] Fix unnecessary call to `computeKnownBits` (NFCI)

Nikita Popov via llvm-commits llvm-commits at lists.llvm.org
Mon May 8 07:14:11 PDT 2023


Author: Dhruv Chawla
Date: 2023-05-08T16:14:01+02:00
New Revision: 1d21d2eb7f1dc205c42cfccd1d7890442a78e912

URL: https://github.com/llvm/llvm-project/commit/1d21d2eb7f1dc205c42cfccd1d7890442a78e912
DIFF: https://github.com/llvm/llvm-project/commit/1d21d2eb7f1dc205c42cfccd1d7890442a78e912.diff

LOG: [TargetLowering] Fix unnecessary call to `computeKnownBits` (NFCI)

In the SimplifyDemandedBits function, there is a fallthrough to the
default case in the case of ISD::ADD, ISD::MUL and ISD::SUB. This
leads to a call to computeKnownBits which is unnecessary as the
calls to SimplifyDemandedBits in the cases themselves handle the
calculation of the known bits. This information is discarded through
the Known2 variables.

By keeping this information around and calling
KnownBits::mul or KnownBits::computeForAddSub directly, the
unnecessary computation can be avoided. For now, the NSW bit is not
passed through to KnownBits as this is something that
computeKnownBits does not handle either. This requires updating
computeForAddCarry to handle the flag as well.

Differential Revision: https://reviews.llvm.org/D150110

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp

Removed: 
    


################################################################################
diff  --git a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index 3a9b62176ea0..7c78699e43a4 100644
--- a/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -2592,9 +2592,10 @@ bool TargetLowering::SimplifyDemandedBits(
     SDNodeFlags Flags = Op.getNode()->getFlags();
     unsigned DemandedBitsLZ = DemandedBits.countl_zero();
     APInt LoMask = APInt::getLowBitsSet(BitWidth, BitWidth - DemandedBitsLZ);
-    if (SimplifyDemandedBits(Op0, LoMask, DemandedElts, Known2, TLO,
+    KnownBits KnownOp0, KnownOp1;
+    if (SimplifyDemandedBits(Op0, LoMask, DemandedElts, KnownOp0, TLO,
                              Depth + 1) ||
-        SimplifyDemandedBits(Op1, LoMask, DemandedElts, Known2, TLO,
+        SimplifyDemandedBits(Op1, LoMask, DemandedElts, KnownOp1, TLO,
                              Depth + 1) ||
         // See if the operation should be performed at a smaller bit width.
         ShrinkDemandedOp(Op, BitWidth, DemandedBits, TLO)) {
@@ -2691,7 +2692,16 @@ bool TargetLowering::SimplifyDemandedBits(
       }
     }
 
-    [[fallthrough]];
+    if (Op.getOpcode() == ISD::MUL) {
+      Known = KnownBits::mul(KnownOp0, KnownOp1);
+    } else { // Op.getOpcode() is either ISD::ADD or ISD::SUB.
+      // TODO: Update `computeForAddCarry` to handle the NSW flag as well so
+      //       that `Flags.hasNoSignedWrap()` can be passed through here
+      //       instead of false.
+      Known = KnownBits::computeForAddSub(Op.getOpcode() == ISD::ADD, false,
+                                          KnownOp0, KnownOp1);
+    }
+    break;
   }
   default:
     // We also ask the target about intrinsics (which could be specific to it).


        


More information about the llvm-commits mailing list