[llvm] 49bef60 - [MC][X86] Fix encoding for VMOVPQIto64Zmr for correct disassembly
Simon Pilgrim via llvm-commits
llvm-commits at lists.llvm.org
Sun May 7 07:25:31 PDT 2023
Author: Simon Pilgrim
Date: 2023-05-07T15:25:13+01:00
New Revision: 49bef60b99de3cf4df94c7c4e8d9681a866ade89
URL: https://github.com/llvm/llvm-project/commit/49bef60b99de3cf4df94c7c4e8d9681a866ade89
DIFF: https://github.com/llvm/llvm-project/commit/49bef60b99de3cf4df94c7c4e8d9681a866ade89.diff
LOG: [MC][X86] Fix encoding for VMOVPQIto64Zmr for correct disassembly
Fixes #62412
Added:
Modified:
llvm/lib/Target/X86/X86InstrAVX512.td
llvm/test/MC/Disassembler/X86/avx-512.txt
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86InstrAVX512.td b/llvm/lib/Target/X86/X86InstrAVX512.td
index af8656cc7d7b..d20f00466a34 100644
--- a/llvm/lib/Target/X86/X86InstrAVX512.td
+++ b/llvm/lib/Target/X86/X86InstrAVX512.td
@@ -4068,7 +4068,7 @@ def VMOVPQIto64Zrr : I<0x7E, MRMDestReg, (outs GR64:$dst), (ins VR128X:$src),
let isCodeGenOnly = 1, ForceDisassemble = 1, hasSideEffects = 0, mayStore = 1 in
def VMOVPQIto64Zmr : I<0x7E, MRMDestMem, (outs), (ins i64mem:$dst, VR128X:$src),
"vmovq\t{$src, $dst|$dst, $src}", []>, PD,
- EVEX, REX_W, Sched<[WriteVecStore]>,
+ EVEX, REX_W, EVEX_CD8<64, CD8VT1>, Sched<[WriteVecStore]>,
Requires<[HasAVX512, In64BitMode]>;
def VMOVPQI2QIZmr : I<0xD6, MRMDestMem, (outs),
diff --git a/llvm/test/MC/Disassembler/X86/avx-512.txt b/llvm/test/MC/Disassembler/X86/avx-512.txt
index b187b7e0cd90..7c6f9d79ebd9 100644
--- a/llvm/test/MC/Disassembler/X86/avx-512.txt
+++ b/llvm/test/MC/Disassembler/X86/avx-512.txt
@@ -55,7 +55,7 @@
# CHECK: vpord %zmm22, %zmm21, %zmm23
0x62 0xa1 0x55 0x40 0xeb 0xfe
-# CHECK: vmovq %xmm19, 2032(%rdx)
+# CHECK: vmovq %xmm19, 1016(%rdx)
0x62 0xe1 0xfd 0x08 0x7e 0x5a 0x7f
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