[PATCH] D150021: [RISCV] Make zve32f imply F and zve64d imply D.

Jianjian Guan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat May 6 00:37:10 PDT 2023

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jacquesguan accepted this revision.
jacquesguan added a comment.
This revision is now accepted and ready to land.

LGTM.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D150021/new/

https://reviews.llvm.org/D150021

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