[PATCH] D149977: [RISCV] Implement shouldTransformSignedTruncationCheck.
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri May 5 11:34:59 PDT 2023
craig.topper created this revision.
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This helps avoid constant materialization for the patterns
InstCombine emits for something like INT_MIN <= X && x <= INT_MAX.
See top of changed test files for more detailed explanation.
I've enabled this for i16 when Zbb is enabled. sext.b did not seem
to be a benefit due to the constants folding into addi/sltiu.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D149977
Files:
llvm/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/lib/Target/RISCV/RISCVISelLowering.h
llvm/test/CodeGen/RISCV/lack-of-signed-truncation-check.ll
llvm/test/CodeGen/RISCV/signed-truncation-check.ll
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