[PATCH] D149689: [X86] Lower used `(atomicrmw xor p, SignBit)` as `(atomicrmw add p, SignBit)`

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon accepted this revision.
RKSimon added a comment.
This revision is now accepted and ready to land.

LGTM



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Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:32257
+    // preferable to both `cmpxchg` and `btc`.
+    if (match(AI->getOperand(1), m_APInt(C)) && C->isMinSignedValue())
+      return AtomicExpansionKind::None;
----------------
goldstein.w.n wrote:
> RKSimon wrote:
> > RKSimon wrote:
> > > While you're here - please can you add a m_MinSignedValue equivalent to the existing m_MaxSignedValue matcher?
> > Or just use m_SignMask?
> used `m_SignMask`. Can add `m_MinSignedValue` if you want, but prefer it in another patch (that I can then base this one on). LMK if you think it would be useful.
m_SignMask is fine - in this case it matches the description better.


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  https://reviews.llvm.org/D149689/new/

https://reviews.llvm.org/D149689