[PATCH] D149689: [X86] Lower used `(atomicrmw xor p, SignBit)` as `(atomicrmw add p, SignBit)`

[Noah Goldstein via Phabricator via llvm-commits]

goldstein.w.n added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:32257
+    // preferable to both `cmpxchg` and `btc`.
+    if (match(AI->getOperand(1), m_APInt(C)) && C->isMinSignedValue())
+      return AtomicExpansionKind::None;
----------------
RKSimon wrote:
> RKSimon wrote:
> > While you're here - please can you add a m_MinSignedValue equivalent to the existing m_MaxSignedValue matcher?
> Or just use m_SignMask?
used `m_SignMask`. Can add `m_MinSignedValue` if you want, but prefer it in another patch (that I can then base this one on). LMK if you think it would be useful.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D149689/new/

https://reviews.llvm.org/D149689