[PATCH] D148109: [mlir] Add a generic mem2reg implementation.

[Mehdi AMINI via Phabricator via llvm-commits]

mehdi_amini added a comment.

It's not clear to me



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Comment at: mlir/include/mlir/Transforms/Passes.td:191
+    within subregions will not happen.
+  }];
+}
----------------
Is it conservative with respect to aliasing? How is this handled?


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  https://reviews.llvm.org/D148109/new/

https://reviews.llvm.org/D148109