[PATCH] D99750: [LV, VP] RFC: VP intrinsics support for the Loop Vectorizer (Proof-of-Concept)
Alexey Bataev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 3 06:19:37 PDT 2023
ABataev added inline comments.
================
Comment at: llvm/include/llvm/IR/Intrinsics.td:1951
+ DefaultAttrsIntrinsic<[llvm_i32_ty],
+ [llvm_anyint_ty, llvm_i64_ty, llvm_i64_ty],
+ [IntrNoMem, IntrNoSync, IntrWillReturn]>;
----------------
craig.topper wrote:
> Any reason for the arguments to be i64 instead of i32?
>
> Are they always constants?
1. Yes, let's make them i32, forgot about 32 bit targets.
2. Currently, yes.
================
Comment at: llvm/lib/Transforms/Vectorize/VPlanRecipes.cpp:1389
+ Constant *WidthArg = State.Builder.getInt64(*State.ElementWidth);
+ Constant *RWFactorArg = State.Builder.getInt64(*State.RegWidthFactor);
+
----------------
craig.topper wrote:
> What is RegWidthFactor supposed to represent?
>
> Can we make this the VF instead?
Generally speaking, LMUL. We can pass VF here, I assume, instead, it should be more portable.
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https://reviews.llvm.org/D99750/new/
https://reviews.llvm.org/D99750
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