[PATCH] D149568: [AMDGPU][NFC] Preserve PDTWrapperPass in UnifyDivergentExitNodes
Mikael Holmén via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed May 3 04:39:00 PDT 2023
uabelho added a comment.
Hi,
With this patch a whole bunch of lit tests fail when compiled with EXPENSIVE_CHECKS on.
Failed Tests (51):
LLVM :: CodeGen/AMDGPU/agpr-copy-no-free-registers.ll
LLVM :: CodeGen/AMDGPU/amdpal_scratch_mergedshader.ll
LLVM :: CodeGen/AMDGPU/atomic_optimizations_pixelshader.ll
LLVM :: CodeGen/AMDGPU/branch-condition-and.ll
LLVM :: CodeGen/AMDGPU/branch-folding-implicit-def-subreg.ll
LLVM :: CodeGen/AMDGPU/branch-relaxation.ll
LLVM :: CodeGen/AMDGPU/build-vector-insert-elt-infloop.ll
LLVM :: CodeGen/AMDGPU/cf-loop-on-constant.ll
LLVM :: CodeGen/AMDGPU/control-flow-optnone.ll
LLVM :: CodeGen/AMDGPU/dagcombine-lshr-and-cmp.ll
LLVM :: CodeGen/AMDGPU/divergence-at-use.ll
LLVM :: CodeGen/AMDGPU/infinite-loop.ll
LLVM :: CodeGen/AMDGPU/insert-delay-alu-bug.ll
LLVM :: CodeGen/AMDGPU/kill-infinite-loop.ll
LLVM :: CodeGen/AMDGPU/loop-live-out-copy-undef-subrange.ll
LLVM :: CodeGen/AMDGPU/mdt-preserving-crash.ll
LLVM :: CodeGen/AMDGPU/mixed-wave32-wave64.ll
LLVM :: CodeGen/AMDGPU/move-to-valu-worklist.ll
LLVM :: CodeGen/AMDGPU/multi-divergent-exit-region.ll
LLVM :: CodeGen/AMDGPU/nested-loop-conditions.ll
LLVM :: CodeGen/AMDGPU/operand-folding.ll
LLVM :: CodeGen/AMDGPU/optimize-negated-cond.ll
LLVM :: CodeGen/AMDGPU/ret_jump.ll
LLVM :: CodeGen/AMDGPU/salu-to-valu.ll
LLVM :: CodeGen/AMDGPU/sdwa-peephole.ll
LLVM :: CodeGen/AMDGPU/si-annotate-cf-noloop.ll
LLVM :: CodeGen/AMDGPU/si-annotate-cf-unreachable.ll
LLVM :: CodeGen/AMDGPU/si-annotate-cf.ll
LLVM :: CodeGen/AMDGPU/si-annotate-cfg-loop-assert.ll
LLVM :: CodeGen/AMDGPU/si-annotate-nested-control-flows.ll
LLVM :: CodeGen/AMDGPU/si-lower-control-flow-unreachable-block.ll
LLVM :: CodeGen/AMDGPU/si-scheduler.ll
LLVM :: CodeGen/AMDGPU/si-unify-exit-multiple-unreachables.ll
LLVM :: CodeGen/AMDGPU/si-unify-exit-return-unreachable.ll
LLVM :: CodeGen/AMDGPU/skip-if-dead.ll
LLVM :: CodeGen/AMDGPU/switch-default-block-unreachable.ll
LLVM :: CodeGen/AMDGPU/tuple-allocation-failure.ll
LLVM :: CodeGen/AMDGPU/uniform-cfg.ll
LLVM :: CodeGen/AMDGPU/unigine-liveness-crash.ll
LLVM :: CodeGen/AMDGPU/unstructured-cfg-def-use-issue.ll
LLVM :: CodeGen/AMDGPU/update-phi.ll
LLVM :: CodeGen/AMDGPU/valu-i1.ll
LLVM :: CodeGen/AMDGPU/vcmp-saveexec-to-vcmpx.ll
LLVM :: CodeGen/AMDGPU/vgpr-descriptor-waterfall-loop-idom-update.ll
LLVM :: CodeGen/AMDGPU/vgpr-liverange-ir.ll
LLVM :: CodeGen/AMDGPU/vgpr-spill-placement-issue61083.ll
LLVM :: CodeGen/AMDGPU/wave32.ll
LLVM :: CodeGen/AMDGPU/wmma_modifiers.ll
LLVM :: Transforms/LoopStrengthReduce/AMDGPU/different-addrspace-crash.ll
LLVM :: Transforms/LoopStrengthReduce/AMDGPU/lsr-void-inseltpoison.ll
LLVM :: Transforms/LoopStrengthReduce/AMDGPU/lsr-void.ll
It can also be reproduced by adding -verify-dom-info.
E.g.
build-all/bin/llc -march=amdgcn < test/Transforms/LoopStrengthReduce/AMDGPU/lsr-void.ll -verify-dom-info
fails with
=============================--------------------------------
Inorder PostDominator Tree: DFSNumbers invalid: 0 slow queries.
[1] <<exit node>> {4294967295,4294967295} [0]
[2] %for.body {4294967295,4294967295} [1]
[3] %entry {4294967295,4294967295} [2]
Roots: %for.body
Freshly computed tree:
=============================--------------------------------
Inorder PostDominator Tree: DFSNumbers invalid: 0 slow queries.
[1] <<exit node>> {4294967295,4294967295} [0]
[2] %DummyReturnBlock {4294967295,4294967295} [1]
[3] %for.body {4294967295,4294967295} [2]
[4] %entry {4294967295,4294967295} [3]
Roots: %DummyReturnBlock
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D149568/new/
https://reviews.llvm.org/D149568
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