[PATCH] D149367: Emit the CodeView `S_ARMSWITCHTABLE` debug symbol for jump tables

Daniel Paoliello via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Apr 28 17:53:53 PDT 2023


dpaoliello marked 5 inline comments as done.
dpaoliello added a comment.

> Can you give an example of an existing tool which parses these for some useful purpose?

Unfortunately, I can't share specifics since the tools that I am focusing on are Microsoft-internal.



================
Comment at: llvm/include/llvm/DebugInfo/CodeView/CodeView.h:631
+  Int8ShiftLeft = 9,
+  Int16ShiftLeft = 10,
+};
----------------
efriedma wrote:
> Maybe worth explaining what these values actually mean?  I assume "Int" is a signed offset, "Uint" is a signed offset, and ShiftLeft involves some sort of multiply.  (The code you linked implies that it's a shift by 1, but maybe the interpretation is different for aarch64?)
I've added a comment to explain this enum. For the `ShiftLeft` values, the amount to shift by is implementation specific.


================
Comment at: llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp:3471
+          // We know the last instruction is a branch, so we can skip checking
+          // its operands.
+          if (MI.getIterator() == LastMI) {
----------------
efriedma wrote:
> This isn't obviously true; 32-bit x86 can do a table lookup and jump in one instruction.
I wasn't aware of that, thanks!


================
Comment at: llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp:3491
+                    "EK_Inline, EK_Custom32, EK_GPRel32BlockAddress, and "
+                    "EK_GPRel64BlockAddress should never be emitted for COFF");
+              case MachineJumpTableInfo::EK_BlockAddress:
----------------
efriedma wrote:
> LLVM can target 32-bit ARM Windows.
I wasn't seeing ARM32 hit this code before, but it looks like it was because of the assumption that the branch instruction wasn't the one to use the jump table value.

I've fixed the code to handle ARM32 and added it to the tests, but there seems to be some bug where the offsets are always 0? If I run the test via `llc` then the correct labels appear in the debug info, but somewhere between `llc -filetype=obj` and `llvm-readobj` the offsets are lost...


================
Comment at: llvm/test/DebugInfo/COFF/jump-table.ll:43
+; A64-NEXT:         BaseOffset: 0x2C
+; CHECK-NEXT:       BaseSection: 0
+; I686-NEXT:        SwitchType: Pointer (0x6)
----------------
efriedma wrote:
> Why are all the section indexes "0"?
Looking at the other uses of `emitCOFFSectionIndex` (e.g., for `S_THUNK32` and `S_GPROC32_ID`), I think this is called a "segment" not "section" in LLVM's vocabulary - I've updated the code and this test.


Repository:
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  https://reviews.llvm.org/D149367/new/

https://reviews.llvm.org/D149367



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