[PATCH] D149367: Emit the CodeView `S_ARMSWITCHTABLE` debug symbol for jump tables

Fri Apr 28 12:44:19 PDT 2023

efriedma added a comment.

Can you give an example of an existing tool which parses these for some useful purpose?

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Comment at: llvm/include/llvm/DebugInfo/CodeView/CodeView.h:631
+  Int8ShiftLeft = 9,
+  Int16ShiftLeft = 10,
+};
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Maybe worth explaining what these values actually mean?  I assume "Int" is a signed offset, "Uint" is a signed offset, and ShiftLeft involves some sort of multiply.  (The code you linked implies that it's a shift by 1, but maybe the interpretation is different for aarch64?)

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Comment at: llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp:3466
+      // We only care about BBs that end with an indirect branch.
+      const auto LastMI = std::prev(MBB.instr_end());
+      if (LastMI->isIndirectBranch()) {
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If a basic block is empty, this crashes, I think.

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Comment at: llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp:3471
+          // We know the last instruction is a branch, so we can skip checking
+          // its operands.
+          if (MI.getIterator() == LastMI) {
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This isn't obviously true; 32-bit x86 can do a table lookup and jump in one instruction.

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Comment at: llvm/lib/CodeGen/AsmPrinter/CodeViewDebug.cpp:3491
+                    "EK_Inline, EK_Custom32, EK_GPRel32BlockAddress, and "
+                    "EK_GPRel64BlockAddress should never be emitted for COFF");
+              case MachineJumpTableInfo::EK_BlockAddress:
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LLVM can target 32-bit ARM Windows.

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Comment at: llvm/test/DebugInfo/COFF/jump-table.ll:43
+; A64-NEXT:         BaseOffset: 0x2C
+; CHECK-NEXT:       BaseSection: 0
+; I686-NEXT:        SwitchType: Pointer (0x6)
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Why are all the section indexes "0"?

Repository:
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  https://reviews.llvm.org/D149367/new/

https://reviews.llvm.org/D149367